CY8C21X45 datasheet(9/50 Pages) CYPRESS

Part #	CY8C21X45

Description	PSoC Programmable System-on-Chip Low power at high speed

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Manufacturer	CYPRESS [Cypress Semiconductor]

Direct Link	http://www.cypress.com

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9 / 50 page

CY8C21634, CY8C21534, CY8C21434

CY8C21334, CY8C21234

Document Number: 38-12025 Rev. *V

Page 9 of 50

20-Pin Part Pinout

Figure 4. CY8C21334 20-Pin PSoC Device

Note

4. These are the ISSP pins, which are not High Z at POR. See the PSoC Technical Reference Manual for details.

SSOP

VDD

P0[6], A, I, M

P0[4], A, I, M

P0[2], A, I, M

P0[0], A, I, M

XRES

P1[6], M

P1[4], EXTCLK, M

P1[2], M

P1[0], I2C SDA, M

20

19

18

17

16

15

14

13

12

11

1

2

3

4

5

6

7

8

9

10

A, I, M, P0[7]

A, I, M, P0[5]

A, I, M, P0[3]

A, I, M, P0[1]

M, I2C SCL, P1[7]

M, P1[3]

VSS

M, I2C SDA, P1[5]

M, I2C SCL, P1[1]

Table 3. Pin Definitions – CY8C21334 20-Pin (SSOP)

Pin No.

Type

Name

Description

Digital

Analog

1

I/O

I, M

P0[7]

Analog column mux input

2

I/O

I, M

P0[5]

Analog column mux input

3

I/O

I, M

P0[3]

Analog column mux input, integrating input

4

I/O

I, M

P0[1]

Analog column mux input, integrating input

5

Power

VSS

Ground connection

6

I/O

M

P1[7]

I2C SCL

7

I/O

M

P1[5]

I2C SDA

8

I/O

M

P1[3]

9

I/O

M

P1[1]

I2C SCL, ISSP-SCLK[4]

10

Power

VSS

Ground connection.

11

I/O

M

P1[0]

I2C SDA, ISSP-SDATA[4]

12

I/O

M

P1[2]

13

I/O

M

P1[4]

Optional external clock input (EXTCLK)

14

I/O

M

P1[6]

15

Input

XRES

Active high external reset with internal pull-down

16

I/O

I, M

P0[0]

Analog column mux input

17

I/O

I, M

P0[2]

Analog column mux input

18

I/O

I, M

P0[4]

Analog column mux input

19

I/O

I, M

P0[6]

Analog column mux input

20

Power

VDD

Supply voltage

LEGEND A = Analog, I = Input, O = Output, and M = Analog Mux Input.

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