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CY7C64713-56LTXC Datasheet(PDF) 2 Page - Cypress Semiconductor |
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CY7C64713-56LTXC Datasheet(HTML) 2 Page - Cypress Semiconductor |
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2 / 72 page  CY7C64713 Document Number: 38-08039 Rev. *J Page 2 of 72 x20 PLL /0.5 /1.0 /2.0 8051 Core 12/24/48 MHz, four clocks/cycle I2C VCC 1.5k D+ D– FX1 GPIF CY Smart USB Engine USB XCVR 16 KB RAM 4 kB FIFO Integrated full speed XCVR Additional IOs (24) ADDR (9) CTL (6) RDY (6) 8/16 24 MHz Ext. XTAL Enhanced USB core Simplifies 8051 code ‘Soft Configuration’ Easy firmware changes FIFO and endpoint memory (master or slave operation) Up to 96 MBytes burst rate General programmable I/F to ASIC/DSP or bus standards such as ATAPI, EPP, etc. Abundant I/O including two USARTS High performance micro using standard tools with lower-power options Master connected for enumeration ECC Logic Block Diagram [+] Feedback |
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