MB85RC16

DS501-00001-2v0-E

5

■ ACKNOWLEDGE (ACK)

acknowledge signal indicates that every 8 bits of the data is successfully sent and received. The receiver

side usually outputs the “L” level every time on the 9th SCL clock after every 8 bits are successfully trans-

mitted. On the transmitter side, the bus is temporarily released on this 9th clock to allow the acknowledge

signal to be received and checked. During this released period, the receiver side pulls the SDA line down to

indicate that the communication works correctly.

If the receiver side receives the stop condition before transmitting the acknowledge “L” level, the read

the Stop condition is not sent, the bus remains in the released state without doing anything.

• Acknowledge timing overview diagram

■ MEMORY ADDRESS STRUCTURE

The MB85RC16 has the memory address buffer to store the 11-bit information for the memory address.

As for byte write, page write and random read commands, the complete 11-bit memory address is configured

by inputting the memory upper address (3 bits) and the memory lower address (8 bits), and saving to the

memory address buffer and access to the memory is performed.

As for a current address read command, the complete 11-bit memory address is configured by inputting the

memory upper address (3 bits) and by the memory address lower 8-bit which has saved in the memory

address buffer, and saving to the memory address buffer and access to the memory is performed.

SCL

123

8

9

SDA

Start

ACK

The transmitter side should always release SDA on the 9th bit.

At this time, the receiver side outputs a pull-down if the

receive of the previous 8 bit works correctly (ACK response).