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LX8816-04CDF Datasheet(PDF) 2 Page - Microsemi Corporation |
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LX8816-04CDF Datasheet(HTML) 2 Page - Microsemi Corporation |
2 / 9 page Microsemi Integrated Products 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 2 Copyright © 2000 Rev. 1.2c, 2005-05-18 LX8816 Dual Channel 1A Low Dropout Regulator PRODUCTION DATA SHEET TM ® ABSOLUTE MAXI MUM RATI NGS Input Voltage (VBAT).................................................................................................. 13.5V Load Current (Internally Limited)................................................................................... 1A Power Dissipation ................................................................................... Internally Limited Short-Circuit Protection ........................................................................................Indefinite Operating Junction Temperature................................................................................150°C Storage Temperature Range........................................................................ -65°C to 150°C Peak Package Solder Reflow Temperature (40 seconds maximum exposure)..................................................................260°C (+0, -5) Note: Exceeding these ratings could cause damage to the device. All voltages are with respect to Ground. Currents are positive into, negative out of specified terminal. TH ERM A L DATA DF Plastic S-Pak 5-Pin THERMAL RESISTANCE-JUNCTION TO TAB, θ JT 4.5°C/W THERMAL RESISTANCE-JUNCTION TO AMBIENT, θ J A 24.5°C/W Junction Temperature Calculation: TJ = TA + (PD x θJA). The θJA numbers are guidelines for the thermal performance of the device/pc-board system. All of the above assume no ambient airflow. θJA can vary from 25°C/W to > 40°C/W depending on mounting technique. (See Application Notes Section: Thermal considerations) PACKAGE PIN OUT 1 2 3 4 5 V 2 V 1 GND ADJ V IN Tab is GND DF PACKAGE (Top View) RoHS 100% Matte Tin Lead Finish FUNCTIONAL PIN DESCRIPTION PIN NAME DESCRIPTION VIN Positive unregulated supply input for the regulator. Bypass to GND with at least 2.2µF capacitance having low ESR for good transient response. ADJ Adjustable Input. The output voltage can be set by two external resistors with the following relationship: V1 = VREF * (1 + R1 / R2) + IADJ * R1 where R1 is the resistor connected between V1 and ADJ, and R2 is the resistor connected between ADJ and GND. GND Common terminal for ground reference. The input and output bypass capacitors should be connected to this pin. In addition the tab on the S-Pak package and pin 3 are also used for heat sinking the device. V1 Adjustable regulator output (Regulator #1) It is recommended to bypass to GND with at least 2.2uF. Size your output capacitor to meet the transient loading requirement. If you have a very dynamic load, a lower ESR capacitor will improve the response to these load steps. V2 Fixed regulator output (Regulator #2). It is recommended to bypass to GND with at least 2.2µF. Size your output capacitor to meet the transient loading requirement. For dynamic loads, a lower ESR capacitor will improve the response to these load steps. |
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