Microsemi

Integrated Products Division

11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570

Page 6

Copyright

© 2000

Rev. 1.0e, 2005-03-03

LX1882

Charge Pump Doubler with Linear Regulator

I N T E GRA T ED

PR ODUC T S

APPLI CATI ON I N FORMATI O N

Using a switched-capacitor charge pump, the LX1882

generates a charge pump output (CPO) voltage approximately

twice the input voltage. The charge pump is a doubler

configuration using one external flying capacitor. A 2-phase

non-overlapping clock, generated from an internally trimmed

oscillator, controls the charge pump switches to ensure

maximum efficiency. CPO powers an internal low dropout

CPO can also be used to drive an external load; refer to section

internal comparators for power-up conditioning. At power-up,

the LDO is disabled and the load is removed from CPO. The

Sensing the LX1882 output current determines the charge pump

operating mode. If the output current is less than 100uA and the

in Burst Mode. In Burst Mode, the clock is disabled for

increased

efficiency,

until

the

CPO

voltage

droops

approximately 100mV at which time the clock is enabled. To

minimize noise at CPO, a low ESR capacitor of at least 2uF

should be used.

The internal LDO can supply up to 50mA of output current

stabilize the internal control loop. A low ESR capacitor of at

least 2uF is recommended.

The LX1882-00 develops a 1.175 reference voltage between the

FB pin and GND. The output voltage can be set using an

external resistor divider (see Figure 3).

7

8

4

1

2

3

6

V

IN

1.8V to 4.4V

OFF ON

V

SHDN

FB

GND

C+

V

IN

C-

CPO

LX1882-00

5

C1

C2

C3

C4

V

OUT

R1

R2

Figure 3. LX1882-00; Adjustable Version

The output voltage range is 2.5V to 5.5V.

voltage of the LDO, and the effective charge pump output

resistance, the maximum available output voltage and current

can be calculated.

The maximum available output voltage can be calculated given

a minimum input voltage and output current load using the

following equation:

Example:

Unloaded CPO Voltage (max) = 6V

Loaded CPO Voltage = 6V – (10mA)(20Ω) = 5.8V

For minimum noise applications, keep the LDO out of dropout to

To reduce noise and ripple, it is recommended to use low ESR

For stability purposes, C2 must be at least 2uF and C3 must be

equal to or greater than C2. It is also recommended that C4 be at

supply to reduce ripple that may be induced onto the voltage rail

due to large instantaneous currents demanded by the charge

pump.

A 0.22uF, low ESR ceramic capacitor is recommended for C1

reduce ripple on CPO.

To minimize the enable time, the CPO filter capacitor (C3)

the LDO is disabled and the load is removed from CPO. When

large amount of charge is dumped from the CPO capacitor into

enable the LDO. This cycle results in an extended enable time.

For the LX1882-33, a 1nF filter capacitor should be connected

between the FILT pin and GND for optimum noise performance.

The CPO can drive an external load. Current draw by the

(i.e. if CPO is driving a 5mA load, the available current from