RangeMAX™

LX1688

Microsemi

Integrated Products Division

11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570

Page 10

Copyright

© 2001

Rev. 1.2, 2006-03-09

Multiple Lamp CCFL Controller

TM

®

APPLICATION INFORMATION

This section will highlight the features of LX1688

controller by showing a practical example. Three identical

inverter modules are connected to each other and each

module drives a single lamp. One module configured as a

master and two others configured as slaves.

A complete schematic hooked up a a master is given in

Figure 1, the schematic provides all necessary functions

such as high voltage feedback for regulation the peak lamp

voltage, short-circuit protection, open lamp sensing and

lamp current regulation needed for a typical application.

The section follows with measurement waveforms and list

of material of the actual modules. For more detail design

procedure and circuit description please refer to application

note (AN-13), which is available in Microsemi’s web site.

The LX1688 controller can operate at 3.3 to 5.0V

±10%, in this application all modules were driven by the

same power voltage (a constant 5.0V), which provides

VDD for controllers, and input voltage for the power

section. Notice that VDD feeds all analog signals and

VDD_P feeds only the output driver stage, these two

signals should be filtered separately (Figure 1).

The value of R1 determines magnitude of internal

current sources that set timing parameters. Equation (2)

gives the relationship between Lamp frequency (FLAMP)

and (RI_R), R1 in schematic. For this application we

choose R6=80.6 KΩ, which results to a lamp frequency at

62.0 KHz.

The LX1688 includes highly integrated universal ‘PWM

or DC’ dim input that allows either a PWM or DC input

without requiring external conditioning.

In this application we choose Digital Dimming by

applying a PWM signal to BRITE pin.

All modules were driven by the same PWM signals, but

notice that it is possible to dim each module quite

separately.

BEPOL pin has three different modes (see table 1), in

this application it is connected to VDD which means active

high enable with active high full brightness.

The PWM signal can be varied in frequency between

48-320 HZ. No capacitor between CPWM1 and CPWM2 is

necessary.

Simply connecting pin 14 to the ground for a master

and to the VDD for a slave will do master and slave

configuration. As shown in figure 2, module (A)

configured as master and modules (B) and (C) configured

as slaves.

To synchronize the Lamp frequency and phase of all

modules, it is required to connect the RMP_RST pin of all

the modules together and connect PHA_SYNC pin of all

the modules together.

By designing the layout in a proper way we can reduce

the overall noise and EMI for the module.

The gate drivers for MOSFETs should have an

independent loop that doesn’t interface with the more

sensitive analog control function, therefore LX1688

provides two power inputs with separate ground pins

(analog/signal), VDD feeds all analog signals and VDD_P

feeds only the output drivers, as shown in figure1 these

two pins (pin 23, 24) are separated and filtered by R14, C2

and C7. The connection of two ground pins should be at

only one point as shown in figure1.

The power traces should be short and wide as possible

and all periphery components such capacitors should be

located as closed as possible to the controller.

The following oscilloscope waveform pictures are

taken from the actual circuits and will show the operation

of the modules in different modes when three identical

modules are synchronized, one as a master, and two others

as slaves.