UCD74106

www.ti.com

SLUSAJ5

– MAY 2011

THERMAL INFORMATION

UCD74106

RGM

UNITS

13 PINS

70.2

47.3

11.0

°C/W

0.9

11.0

0.9

(1)

For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

(2)

The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as

specified in JESD51-7, in an environment described in JESD51-2a.

(3)

The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific

JEDEC-standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.

(4)

The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB

temperature, as described in JESD51-8.

(5)

The junction-to-top characterization parameter,

from the simulation data for obtaining

(6)

The junction-to-board characterization parameter,

from the simulation data for obtaining

(7)

The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific

JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.

RECOMMENDED OPERATING CONDITIONS

over operating free-air temperature range (unless otherwise noted)

MIN

TYP

MAX

UNIT

Power input voltage

Internally generated VGG

4.5

12

16

Power input voltage

Externally supplied VGG

2.2

12

16

V

Externally supplied gate drive voltage

4.5

6.2

G

Operating junction temperature range

-40

125

◦C

Copyright

© 2011, Texas Instruments Incorporated

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