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TPS65920BZCH Datasheet(PDF) 5 Page - Texas Instruments |
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TPS65920BZCH Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 117 page  TPS65930/TPS65920 www.ti.com SWCS037G – MAY 2008 – REVISED APRIL 2011 List of Figures 1-1 TPS65920 Block Diagram ....................................................................................................... 12 1-2 TPS65930 Block Diagram ....................................................................................................... 12 2-1 PBGA Bottom View .............................................................................................................. 13 4-1 Power Provider Block Diagram ................................................................................................. 27 4-2 VDD1 dc-dc Regulator Efficiency .............................................................................................. 30 4-3 VDD1 dc-dc Application Schematic ............................................................................................ 31 4-4 VDD2 dc-dc Regulator Efficiency .............................................................................................. 33 4-5 VDD2 dc-dc Application Schematic ............................................................................................ 34 4-6 VIO dc-dc Regulator Efficiency ................................................................................................. 36 4-7 VIO dc-dc Application Schematic .............................................................................................. 37 4-8 Timing Before Sequence Start ................................................................................................. 50 4-9 Timings –Power On in OMAP3 Mode .......................................................................................... 51 4-10 Timings —Power On in Slave_C021 Mode .................................................................................... 52 4-11 Power-Off Sequence in Master Modes ....................................................................................... 53 6-1 Audio/Voice Module Block Diagram ........................................................................................... 55 6-2 Predriver for External Class D .................................................................................................. 57 6-3 Vibrator H-Bridge ................................................................................................................. 58 6-4 Carkit Output Downlink Path Characteristics ................................................................................. 58 6-5 Digital Audio Filter Downlink Path Characteristics ........................................................................... 59 6-6 Analog Microphone Pseudodifferential ........................................................................................ 62 6-7 Analog Microphone Differential ................................................................................................. 63 6-8 Silicon Microphone ............................................................................................................... 64 6-9 Audio Auxiliary Input ............................................................................................................. 65 6-10 Uplink Amplifier ................................................................................................................... 65 6-11 Carkit Input Uplink Path Characteristics ...................................................................................... 67 6-12 Digital Audio Filter Uplink Path Characteristics .............................................................................. 68 7-1 USB 2.0 PHY Block Diagram ................................................................................................... 69 7-2 USB System Application Schematic ........................................................................................... 70 7-3 HS-USB Interface —Transmit and Receive Modes (ULPI 8-bit) ............................................................ 71 7-4 USB-CEA Carkit UART Data Flow ............................................................................................. 72 7-5 USB-CEA Carkit UART Timings ................................................................................................ 73 8-1 Conversion Sequence General Timing Diagram ............................................................................. 80 9-1 LED Driver Block Diagram ...................................................................................................... 81 10-1 Keyboard Connection ............................................................................................................ 82 11-1 Clock Overview ................................................................................................................... 83 11-2 HFCLKIN Clock Distribution .................................................................................................... 84 11-3 Example of Wired-OR Clock Request ......................................................................................... 85 11-4 HFCLKIN Squared Input Clock ................................................................................................. 86 11-5 32-kHz Oscillator Block Diagram In Master Mode With Crystal ............................................................ 87 11-6 32-kHz Crystal Input ............................................................................................................. 88 11-7 32-kHz Oscillator Block Diagram Without Crystal Option 1 ................................................................. 89 11-8 32-kHz Oscillator Block Diagram Without Crystal Option 2 ................................................................. 90 11-9 32-kHz Oscillator in Bypass Mode Block Diagram Without Crystal Option 3 ............................................ 90 11-10 32-kHz Square- or Sine-Wave Input Clock ................................................................................... 91 11-11 32.768-kHz Clock Output Block Diagram ..................................................................................... 91 11-12 32KCLKOUT Output Clock ...................................................................................................... 92 11-13 HFCLKOUT Output Clock ....................................................................................................... 93 Copyright © 2008–2011, Texas Instruments Incorporated List of Figures 5 |
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