TLE42744

General Product Characteristics

Data Sheet

8

Rev. 1.1, 2010-01-13

TLE42744EV50 (PG-SSOP-14 exposed pad)

4.3.11

Junction to Case1)

R

thJC

–

7

–

K/W

measured to

exposed pad

4.3.12

Junction to Ambient1)

R

thJA

–43

–

K/W

2)

4.3.13

–

120

–

K/W

footprint only3)

4.3.14

–

59

–

K/W

300 mm² heatsink

area3)

4.3.15

–

49

–

K/W

600 mm² heatsink

area3)

TLE42744GSV33 (PG-SOT223-4)

4.3.16

Junction to Case1)

R

thJC

–

17

–

K/W

measured to heat

slug

4.3.17

Junction to Ambient1)

R

thJA

–54

–

K/W

2)

4.3.18

–

139

–

K/W

footprint only3)

4.3.19

–

73

–

K/W

300 mm² heatsink

area3)

4.3.20

–

64

–

K/W

600 mm² heatsink

area3)

1) Not subject to production test, specified by design.

2) Specified

R

(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm³ board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm Cu).

Where applicable a thermal via array under the exposed pad contacted the first inner copper layer.

3) Specified

R

(Chip+Package) was simulated on a 76.2

Pos.

Parameter

Symbol

Limit Values

Unit

Conditions

Min.

Typ.

Max.