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TLE42694GM Datasheet(PDF) 7 Page - Infineon Technologies AG |
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TLE42694GM Datasheet(HTML) 7 Page - Infineon Technologies AG |
7 / 29 page Data Sheet 7 Rev. 1.2, 2010-11-26 TLE42694 Pin Configuration 3.5 Pin Assignment PG-SSOP-14 exposed pad PinConfig_SSOP-14.vsd RADJ SI n.c. D GND n.c. n.c. RO I n.c. Q n.c. n.c. SO 1 2 3 4 5 6 7 14 13 12 11 10 9 8 Figure 4 Pin Configuration (top view) 3.6 Pin Definitions and Functions PG-SSOP-14 exposed pad Table 3 Pin Symbol Function 1 RADJ Reset Threshold Adjust connect an external voltage divider to adjust reset threshold; connect to GND for using internal threshold 2, 5, 6 n.c. not connected 3 D Reset Delay Timing connect a ceramic capacitor to GND for adjusting the reset delay time; leave open if the reset function is not needed 4 GND Ground all pins must be connected to GND 7 RO Reset Output open collector output; internally linked to the output via a 20k Ω pull-up resistor; leave open if the reset function is not needed 8 SO Sense Output open collector output; internally linked to the output via a 20k Ω pull-up resistor; leave open if the sense comparator is not needed 9, 10, 12 n.c. not connected 11 Q Output block to GND with a capacitor close to the IC terminals, respecting the values given for its capacitance CQ and ESR in the table “Functional Range” on Page 7 13 I Input for compensating line influences, a capacitor to GND close to the IC terminals is recommended 14 SI Sense Input connect the voltage to be monitored; connect to Q if the sense comparator is not needed Pad - Exposed Pad connect to heatsink area; connect to GND |
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