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PCF2119X Datasheet(PDF) 11 Page - NXP Semiconductors |
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PCF2119X Datasheet(HTML) 11 Page - NXP Semiconductors |
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11 / 83 page  PCF2119X All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 9 — 14 April 2011 11 of 83 NXP Semiconductors PCF2119x LCD controllers/drivers Remarks: • Values producing more than 6.5 V at operating temperature are not allowed. Operation above this voltage may damage the device. When programming the operating voltage, the temperature coefficient of VLCDOUT must be taken into account. • Values below 2.2 V are below the specified operating range of the chip and are therefore not allowed. When the LCD supply voltage is generated on-chip, the VLCD pins should be decoupled to VSS with a suitable capacitor. The generated VLCDOUT is independent of VDD and is temperature compensated. In Equation 2 the internal charge pump is not considered. However, if the supplied voltage to VDD2 and VDD3 is below the required VLCD it is necessary to use the internal charge pump. The multiplication factor has to be set such, that VDD2 and VDD3 (which are equal) multiplied with the programmed multiplication factor exceeds the required VLCD under all circumstances (i.e. at low temperatures and along with the temperature compensation - see Section 10.2.3.4). If still a higher multiplication factor is chosen, VLCD will not increase (it is set by Equation 2) but the current that can be delivered will be higher. Also current consumption increases (see Section 16.6). When the VLCD generator and the direct mode are switched off, an external voltage may be supplied at connected pins VLCDIN and VLCDOUT. VLCDIN and VLCDOUT may be higher or lower than VDD2. In direct mode (see Icon_ctl instruction, Section 10.2.3.3) the internal VLCD generator is turned off and the VLCDOUT output voltage is directly connected to VDD2. This reduces the current consumption depending on VDD2 value and LCD liquid properties. The VLCD generator ensures that, as long as VDD2 and VDD3 are in the valid range (2.2 V to 4 V), the required peak voltage VLCD = 6.5 V can be generated at any time. 8.5 LCD bias voltage generator The intermediate bias voltages for the LCD display are also generated on-chip. This removes the need for an external resistive bias chain and significantly reduces the system current consumption. The optimum value of VLCD depends on the multiplex rate, the LCD threshold voltage (Vth) and the number of bias levels. Using a 5-level bias scheme for the 1:18 multiplex rate allows VLCD < 5 V for most LCD liquids. The intermediate bias levels for the different multiplex rates are shown in Table 6. These bias levels are automatically set to the given values when switching to the corresponding multiplex rate. |
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