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MPC5674K Datasheet(PDF) 6 Page - Freescale Semiconductor, Inc |
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MPC5674K Datasheet(HTML) 6 Page - Freescale Semiconductor, Inc |
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6 / 140 page  MPC5675K Microcontroller Data Sheet, Rev. 4 Preliminary—Subject to Change Without Notice Overview Freescale Semiconductor 6 1.3 Feature list • High-performance e200z7d dual core — 32-bit Power Architecture technology CPU — Up to 180 MHz core frequency — Dual-issue core — Variable length encoding (VLE) — Memory management unit (MMU) with 64 entries — 16 KB instruction cache and 16 KB data cache • Memory available — Up to 2 MB Code flash memory with ECC — 64 KB Data flash memory with ECC — Up to 512 KB on-chip SRAM with ECC • SIL3/ASILD innovative safety concept: LockStep mode and fail-safe protection — Sphere of replication (SoR) for key components — Redundancy checking units on outputs of the SoR connected to FCCU — Fault collection and control unit (FCCU) — Boot-time built-in self-test for memory (MBIST) and logic (LBIST) triggered by hardware — Boot-time built-in self-test for ADC and flash memory — Replicated safety-enhanced watchdog timer — Junction temperature sensor — Non-maskable interrupt (NMI) — 16-region memory protection unit (MPU) — Clock monitoring units (CMU) — Power management unit (PMU) — Cyclic redundancy check (CRC) units • Decoupled Parallel mode for high-performance use of replicated cores • Nexus Class 3+ interface • Interrupts — Replicated 16-priority interrupt controller — Replicated 32-channel eDMA controller • GPIOs individually programmable as input, output, or special function • Three general-purpose eTimer units (6 channels each) • Three FlexPWM units with four 16-bit channels per module • Communications interfaces — 4 LINFlex modules — 3 DSPI modules with automatic chip select generation — 4 FlexCAN interfaces (2.0B Active) with 32 message objects |
Similar Part No. - MPC5674K |
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Similar Description - MPC5674K |
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