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I.MX27L_11 Datasheet(PDF) 7 Page - Freescale Semiconductor, Inc

Part No. I.MX27L_11
Description  Multimedia Applications Processor Multiple clock and power domains
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Maker  FREESCALE [Freescale Semiconductor, Inc]
Homepage  http://www.freescale.com
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 7 page
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i.MX27 and i.MX27L Data Sheet, Rev. 1.7
Freescale Semiconductor
7
Functional Description and Application Information
IIM
IC Identification
Module
Security
The IIM provides an interface for reading—and in some cases,
programming, and overriding identification and control
information stored in on-chip fuse elements.
Contact your Freescale Semiconductor sales office or
distributor for additional information on SCC, RTIC, IIM,
SAHARA2
2.3.17/17
JTAGC
JTAG Controller
Debug
The JTAGC provides debug access to the ARM926 core,
built-in self-test (BIST), and boundary scan test control.
2.3.18/17
KPP
Keypad Port
Connectivity
Peripheral
The KPP is used for key pad matrix scanning or as a general
purpose I/O. This peripheral simplifies the software task of
scanning a keypad matrix.
2.3.19/17
LCDC
Liquid Crystal
Display
Controller
Multimedia
Interface
The LCDC provides display data for external gray-scale or
color LCD panels.
2.3.20/17
M3IF
Multi-Master
Memory
Interface
External
Memory
Interface
The M3IF controls memory accesses from one or more
masters through different port interfaces to different external
memory controllers ESDCTL/MDDRC, PCMCIA, NFC, and
WEIM.
2.3.21/18
MAX
Multi-layer AHB
Crossbar Switch
Bus Control
The ARM926EJ-S processor’s instruction and data buses and
all alternate bus master interfaces arbitrate for resources via a
6
× 3 MAX. There are six fully functional master ports (M0–M5)
and three fully functional slave ports (S0–S2). The MAX is
uni-directional. All master and slave ports are AHB-Lite
compliant.
2.3.22/18
MSHC
Memory Stick
Host Controller
Connectivity
Peripheral
The MSHC is placed in between the AIPI and the customer
memory stick to support data transfer from the i.MX27 device
to the customer memory stick.
Note: The i.MX27L does not support the MSHC feature
2.3.23/19
NFC
NAND Flash
Controller
External
Memory
Interface
The NFC is a submodule of EMI. The NFC implements the
interface to standard NAND Flash memory devices.
2.3.24/19
PCMCIA
Personal
Computer
Memory Card
International
Association
External
Memory
Interface
The PCMCIA host adapter module provides the control logic
for PCMCIA socket interfaces, and requires some additional
external analog power switching logic and buffering.
2.3.25/20
PLL
Phase Lock
Loop
Clock and
Reset Control
The two DPLLs provide clock generation in digital and mixed
analog/digital chips designed for wireless communication and
other applications.
2.3.26/20
PWM
Pulse-Width
Modulator
Timer
Peripheral
The PWM has a 16-bit counter and is optimized to generate
sound from stored sample audio images. It can also generate
tones.
2.3.27/20
Table 2. Digital and Analog Modules (continued)
Block Mnemonic
Block Name
Functional
Grouping
Brief Description
Section/
Page




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