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LTC3725 Datasheet(PDF) 10 Page - Linear Technology |
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LTC3725 Datasheet(HTML) 10 Page - Linear Technology |
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10 / 26 page  LT4430 10 4430fb If the fault condition ceases, the output voltage increases. In response, the error amplifier COMP pin’s voltage decreases. This action opens switch S1, deactivates the overshoot control amplifier and allows the OC pin capacitor to charge. The FB pin voltage increases quickly until the FB pin voltage exceeds the OC pin voltage. The feedback loop increases the drive to the opto-coupler until the FB pin follows and regulates to the OC pin voltage. Again, as the OC pin voltage increases past 600mV, the reference voltage takes control of the error amplifier and the FB pin regulates to 600mV. Generating a VIN Bias Supply Biasing an LT4430 is crucial to proper operation. If the overshoot control (OC) function is not being used and the output voltage is greater than 3.3V, the IC may be biased from VOUT. In these cases, it is the user’s responsibility to verify large-signal start-up and fault recovery behavior. If the overshoot control function is being used or the output voltage is below the LT4430’s minimum operat- ing voltage of 3V, employing an alternate bias method is necessary. The LT4430’s undervoltage lockout (UVLO) circuitry, controlled by VIN, resets and holds the OC pin capacitor low for VIN less than 2.2V. When VIN increases above 2.2V, the circuit releases the OC pin capacitor. The LT4430’s supply voltage must come up faster than the output voltage to assert loop control and limit output volt- age overshoot. In most cases, a few simple components accomplish this task. Adding a few biasing components to control overshoot is advantageous. Let’s examine bias circuits for different topologies. Figures 1a to 1e illustrate bias supply circuits for the flyback converter. Figure 1a shows the typical flyback output connection. Figures 1b and 1c exhibit equivalent circuit performance but rotate the rectifier connection to the ground-referred side. This connection permits the user to take advantage of the transformer secondary’s forward behavior when the primary-side switch is on. Figures 1d to 1e illustrate the bias generator circuit. VIN • N volts appear across the secondary winding when the primary-side switch is on. D2 forward biases and C1 charges. During this time, the secondary-voltage is in series with VOUT and C1 ultimately charges to (VIN • N + VOUT – VF). VF is the forward voltage of D2. When VOUT is zero at start-up, VIN • N volts exists to charge C1. C1 is generally much smaller in value than COUT and the bias supply starts up ahead of VOUT. R1 in Figures 1d and 1e limits peak charging currents, lowering D2’s current rating. R1 also filters C1 from peak-charging to the volt- age spikes induced by the secondary winding’s leakage inductance. Between 1 Ω to 10Ω is generally sufficient. R1 is usually necessary if C1 is a low ESR ceramic capacitor or if the transformer has high leakage inductance. It may be possible to eliminate R1 if C1 is a low cost, high ESR, surface-mount tantalum. VIN variation changes the bias supply in Figure 1d. Depend- ing on VOUT, the transformer turns ratio N and VIN range, the bias supply may exceed the LT4430’s 20V VIN absolute maximum rating. If this occurs, two solutions exist. One is to tap the secondary-side inductor to create a lower voltage from which to rectify as illustrated in Figure 2a. The bias voltage decreases to (VIN • N1/N + VOUT – VF). This solution relies on secondary-side pins being available for the tap point. APPLICATIONS INFORMATION |
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Similar Description - LTC3725 |
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