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MC68302RC20 Datasheet(PDF) 6 Page - Motorola, Inc |
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MC68302RC20 Datasheet(HTML) 6 Page - Motorola, Inc |
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6 / 480 page  Table of Contents Paragraph Title Page Number Number vi MC68302 USER’S MANUAL MOTOROLA 3.1.4.3 Address Sequencing..............................................................................3-10 3.1.4.4 Transfer Request Generation ................................................................3-11 3.1.4.5 Block Transfer Termination....................................................................3-12 3.1.5 IDMA Programming ...............................................................................3-13 3.1.6 DMA Bus Arbitration ..............................................................................3-14 3.1.7 Bus Exceptions ......................................................................................3-14 3.1.7.1 Reset......................................................................................................3-15 3.1.7.2 Bus Error................................................................................................3-15 3.1.7.3 Halt.........................................................................................................3-15 3.1.7.4 Relinquish and Retry..............................................................................3-15 3.2 Interrupt Controller .................................................................................3-15 3.2.1 Overview ................................................................................................3-16 3.2.1.1 IMP Interrupt Processing Overview .......................................................3-16 3.2.1.2 Interrupt Controller Overview .................................................................3-17 3.2.2 Interrupt Priorities...................................................................................3-18 3.2.2.1 INRQ and EXRQ Priority Levels ............................................................3-18 3.2.2.2 INRQ Interrupt Source Priorities ............................................................3-19 3.2.2.3 Nested Interrupts ...................................................................................3-19 3.2.3 Masking Interrupt Sources and Events ..................................................3-20 3.2.4 Interrupt Vector ......................................................................................3-21 3.2.5 Interrupt Controller Programming Model................................................3-24 3.2.5.1 Global Interrupt Mode Register (GIMR) .................................................3-24 3.2.5.2 Interrupt Pending Register (IPR)............................................................3-26 3.2.5.3 Interrupt Mask Register (IMR)................................................................3-27 3.2.5.4 Interrupt In-Service Register (ISR).........................................................3-28 3.2.6 Interrupt Handler Examples ...................................................................3-28 3.3 Parallel I/O Ports....................................................................................3-29 3.3.1 Port A .....................................................................................................3-29 3.3.2 Port B .....................................................................................................3-31 3.3.2.1 PB7–PB0 ...............................................................................................3-31 3.3.2.2 PB11–PB8 .............................................................................................3-32 3.3.3 I/O Port Registers ..................................................................................3-32 3.4 Dual-Port RAM.......................................................................................3-33 3.5 Timers ....................................................................................................3-35 3.5.1 Timer Key Features ...............................................................................3-36 3.5.2 General Purpose Timer Units ................................................................3-37 3.5.2.1 Timer Mode Register (TMR1, TMR2) ....................................................3-37 3.5.2.2 Timer Reference Registers (TRR1, TRR2)............................................3-38 3.5.2.3 Timer Capture Registers (TCR1, TCR2)................................................3-39 3.5.2.4 Timer Counter (TCN1, TCN2)................................................................3-39 3.5.2.5 Timer Event Registers (TER1, TER2)....................................................3-39 3.5.2.6 General Purpose Timer Example...........................................................3-40 3.5.2.6.1 Timer Example 1....................................................................................3-40 3.5.2.6.2 Timer Example 2....................................................................................3-40 3.5.3 Timer 3 - Software Watchdog Timer ......................................................3-41 |
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