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P5CD081XE Datasheet(PDF) 3 Page - NXP Semiconductors

Part # P5CD081XE
Description  Secure dual interface and contact PKI smart card controller
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

P5CD081XE Datasheet(HTML) 3 Page - NXP Semiconductors

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P5CD016_021_041_51_Cx081_FAM_SDS
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product short data sheet
PUBLIC
Rev. 3.2 — 14 March 2011
150332
3 of 20
NXP Semiconductors
P5CD016/021/041/051 and P5Cx081
Secure dual interface and contact PKI smart card controller
1.4.3 AES coprocessor
SmartMX is the first smart card microcontroller platform to provide a dedicated high
performance 128-bit parallel processing coprocessor to support secure AES. The
implementation is based on FIPS197 as standardized by the National Institute for
Standards and Technology (NIST), and supports key lengths of 128-bit, 192-bit, and
256-bit with performance levels comparable to DES. AES is the next generation for
symmetric data encryption and recommended successor to DES providing significantly
improved security level. A secure crypto library element for AES is available.
1.5 SmartMX interfaces
1.5.1 SmartMX contact interface
Operating in accordance with ISO/IEC 7816, the SmartMX contact interface is supported
by a built-in Universal Asynchronous Receiver/Transmitter (UART), which enables data
rates of up to 1 Mbit/s allowing for the automatic generation of all typical baud rates and
supports transmission protocols T=0 and T=1. Up to two additional I/Os are available.
1.5.2 SmartMX contactless interface
The optional contactless interface is fully compatible with ISO/IEC 14443 A as well as
NXP Semiconductors’ field proven MIFARE technology. A dedicated Contactless Interface
Unit (CIU) manages and supports communication using data rates up to 848 kbit/s. A true
anti-collision method (in accordance with ISO/IEC 14443-3) enables multiple cards to be
handled simultaneously.
The optional MIFARE functionality provided in configurations B1 (MIFARE 1K
implementation), B4 (MIFARE 4K implementation), D1 (MIFARE 1K implementation with
MIFARE simultaneous operation enabled) and D4 (MIFARE 4K implementation with
MIFARE simultaneous operation enabled) safeguard the interface compatibility with any
installed MIFARE infrastructure. The ability to run the MIFARE protocol concurrently with
other contactless transmission protocols implemented by the customer code (T=CL or self
defined) enables the combination of new services and existing applications based on
MIFARE (e.g. ticketing) on a single dual interface controller based smart card.
The MIFARE implementation on the SmartMX makes use of the approved true random
number generator and thus is not susceptible to attacks based on the predictability of
random numbers. This emulation is separated from the rest of the SmartMX by a firewall
that is part of the Common Criteria evaluation.
A tutorial software library for ISO/IEC 14443-3 and ISO/IEC 14443-4 is available to
support NXP Semiconductors’ customers for easy integration of the contactless
technology into current system solutions.
The input capacitance can be factory configured for either standard loop antennas or for
smaller antennas (such as “ID1/2” antennas). This is accomplished by setting the device
input capacitance to either the standard value or to a higher value.
1.5.3 SmartMX S2C interface
The S2C interface is intended for use with NXP Semiconductors NFC circuits (e.g. PN544)
in order to configure secure NFC systems, for example in mobile hand sets.


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