AN-6754A

APPLICATION NOTE

© 2010 Fairchild Semiconductor Corporation

www.fairchildsemi.com

Rev. 1.0.0 • 10/8/10

5

Leading-Edge Blanking (LEB)

Each time the power MOSFET is switched on, a turn-on

caused by primary-side capacitance and secondary-side

rectifier reverse recovery. To avoid premature termination

of the switching pulse, a leading-edge blanking time is built

in. During this blanking period (280ns), the PWM

comparator is disabled and cannot switch off the gate driver.

Thus, RC filter with a small RC time constant (e.g. 100Ω +

470pF) is enough for current sensing. A non-inductive

Figure 11.

Turn-On Spike

Output Driver / Soft Driving

The output stage is a fast totem-pole gate driver capable of

directly driving external MOSFETs. An internal Zener

diode, shown in Figure 12, clamps the driver voltage under

13V to protect the MOSFET gate from over voltage. With

integrating circuits to control the slew rate of the switch

necessary to reduce switching noise.

Gate

FAN6754A

On/Off

Logic

13V

Figure 12.

Gate Driver

High/Low Line Compensation in HV Pin

The conventional pulse-by-pulse current limiting scheme

has a constant threshold for the current-limit comparator,

which results in a higher power limit for high line voltage.

The FAN6754A has a current-limit threshold that decreases

as line voltage increases to makes the actual power limit

level almost constant over different line voltages within a

universal input voltage range, as shown in Figure 13. In the

FAN6754A, the peak-current limiting threshold is adjusted

by the peak voltage of the HV pin. When the internal circuit

detailed in Figure 14 samples the line voltage information,

an internal 1.62kΩ resistor is connected to the HV pin to

scale down the line voltage by forming a voltage divider

Figure 13.

Universal Line Voltage Compensation

for Constant Output Power Limit

Figure 14.

Brownout Protection in HV Pin

As shown in Figure 15, the AC line voltage is monitored by

internal line voltage sample circuit. Figure 16 shows

brownout protection behavior when the circuit uses the half-

operate without any debounce time. Meanwhile, the PWM

equations:

2

/

)

6

.

1

6

.

1

9

.

0

(

)

(

ON

-

AC

+

×

=

HV

R

RMS

V

(1)

.

k

in

is

R

where

or

HV

OFF

-

AC

Ω

+

×

=

2

/

)

6

.

1

6

.

1

R

81

.

0

(

)

RMS

(

V

HV

(2)

1V

3V

0.39

0.46

AC In

GND

1.62kΩ

Line Sample

Circuit