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AN-6083 Datasheet(PDF) 3 Page - Fairchild Semiconductor |
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AN-6083 Datasheet(HTML) 3 Page - Fairchild Semiconductor |
3 / 9 page AN-6083 APPLICATION NOTE © 2008 Fairchild Semiconductor Corporation www.fairchildsemi.com Rev. 1.0.2 • 3/11/09 3 function internally. The frequency variation ranges from around 61KHz to 69KHz for a center frequency 65KHz. The frequency hopping function helps reduce EMI emission of a power supply with minimum line filters. RI GND FAN6791 RI Figure 5. Setting the PWM Frequency For power saving, flyback PWM stage has a green mode function. Frequency linearly decreases when VFBFYB is within VG and VN. Once VFBFYB is lower than VG, switching frequency disables, and it enters burst mode. Figure 6. Oscillation Frequency in Green Mode Line Voltage Detection (VRMS) Xxx Figure 7 shows a resistive divider with low-pass filtering for line-voltage detection on VRMS pin. The VRMS voltage is used for brownout protection: when VRMS drops below 0.8V, OPWM turns off. Figure 7. Line-Voltage Detection on VRMS Pin Remote On/Off Figure 8 shows the remote on / off function. When the supervisor FPO pin pulls down and enables the system by connecting an opto-coupler, VREF applies to the ON/OFF pin to enable forward PWM stage. Figure 8. Remote On/Off Interleave Switching The FAN6791 uses interleaved switching to synchronize the stand-by PWM / forward PWM stages. This reduces switching noise and spreads the EMI emissions. Figure 9 shows off-time tOFF is inserted in between the turn-off of the stand-by gate drives and the turn-on of the forward PWM. Figure 9. Interleaved Switching FBFYB and FBPWM The FAN6791 is designed for peak-current-mode control. A current-to-voltage conversion is done externally with a current-sense resistor RS. Under normal operations, the peak inductor is controlled by an FBFYB level as: 1.3 3.2 − = × FBFYB PEAK S V I R (5) when VFBFYB is less than 1.3V, the FAN6791 terminates the output pulses. Figure 10 is a typical feedback circuit consisting mainly of a shunt regulator and an opto-coupler. R1 and R2 form a voltage divider for the output voltage regulation. R3 and C1 are adjusted for control-loop compensation. A small-value RC filter (e.g. RFB = 47Ω, CFB = 1nF) placed on the FB pin to the GND can further increase the stability. |
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