AN-1577

APPLICATION NOTE

© 2009 Fairchild Semiconductor Corporation

www.fairchildsemi.com

Rev. 1.0.0 • 7/31/09

2

Figure 1. Power Loop

Practical Cases

SG1577A is used for ATX power supply field, so SG1577A

hosts the single-layer board or a daughter board plugged into

the main board. The below sections provide good possible

layouts for two cases.

Case 1: Single-Layer

Power Loop

CLNx trace between high-side and low-side MOSFET

should be copper-filled polygons. Do not use a jumper

(which results in a parasitic inductance and induce a

negative spike on this node).

The specification for CLN to GND is:

CLN to GND for 100ns Transient:

-4V Min.

18V Max

The high-current loop should be small to prevent EMI

issues.

The input capacitors (ceramic and E/C) and output

capacitors should be near the relative rail.

GND, consider the rating current. Two/three pieces of

paralleled jumpers not only improved the rating current, but

also reduced the parasitic inductance. Due to this jumper,

the IC PGND should not be connected here!

SG1577

Upper

Upper

Lower

Lower

Lower

Lower

Snubber

Snubber