V3

MASW-005100-1194

HMIC™ SP5T Silicon PIN Diode Switch

ADVANCED: Data Sheets contain information regarding a product M/A-COM Technology Solutions

is considering for development. Performance is based on target specifications, simulated results,

and/or prototype measurements. Commitment to develop is not guaranteed.

PRELIMINARY: Data Sheets contain information regarding a product M/A-COM Technology

Solutions has under development. Performance is based on engineering tests. Specifications are

typical. Mechanical outline has been fixed. Engineering samples and/or test data may be available.

Commitment to produce in volume is not guaranteed.

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5

2 – 18 GHz Bias Network Schematic

HMIC Switch Die

100 Ω

39 pF

22 nH

22 pF

39 pF

DC

Bias

J1

22 nH

22 pF

J2

J3

J5

J6

J4

Fig. 1

Operation of the MASW-005100-1194 Switch

The simultaneous application of negative DC current to the low loss port and positive DC current to the

remaining isolated ports as shown in Figure 1 will operate the MASW-005100-1194 PIN diode switch. The

backside metalized area of the die is the RF and DC return ground plane. The DC return is achieved on

common Port J1. A current source should be used to supply the DC control currents. The voltages at

these points will not exceed ±1.5 volts and are typically 1.2 volts for supply currents up to ± 20 mA. For

the port in low loss state, the series diode must be forward biased and the shunt diode reverse biased.

For all the isolated ports, the shunt diode is forward biased and the series diode is reverse biased. A

typical bias network design which should provide >30 dB RF to DC isolation is shown in Figure 1.

Best

insertion loss, P1dB, IP3, and switching speed are achieved by using a voltage pull-up resistor in the

DC return path, J1 (not shown). A minimum value of |-2V| is recommended at this return node and

can be obtained using a standard, 65V, TTL controlled, PIN diode driver.