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KSZ8842-16MBLI Datasheet(PDF) 10 Page - Micrel Semiconductor |
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KSZ8842-16MBLI Datasheet(HTML) 10 Page - Micrel Semiconductor |
10 / 141 page Micrel, Inc. KSZ8842-16/32 MQL/MVL/MVLI/MBL October 2007 10 M9999-102207-1.9 List of Tables Table 1. MDI/MDI-X Pin Definitions............................................................................................................................................. 29 Table 2. Bus Interface Unit Signal Grouping ............................................................................................................................... 38 Table 3: Transmit Queue Frame Format ..................................................................................................................................... 41 Table 4. Transmit Control Word Bit Fields................................................................................................................................... 42 Table 5. Transmit Byte Count Format ......................................................................................................................................... 42 Table 6. Receive Queue Frame Format ...................................................................................................................................... 42 Table 7. FRXQ Packet Receive Status........................................................................................................................................ 43 Table 8. FRXQ RX Byte Count Field ........................................................................................................................................... 43 Table 9. Spanning Tree States.................................................................................................................................................... 44 Table 10. FID+DA Lookup in VLAN Mode ................................................................................................................................... 46 Table 11. FID+SA Lookup in VLAN Mode ................................................................................................................................... 46 Table 12. EEPROM Format......................................................................................................................................................... 48 Table 13. ConfigParam Word in EEPROM Format ..................................................................................................................... 49 Table 14. Format of Per Port MIB Counters .............................................................................................................................. 116 Table 15. Port 1 MIB Counters Indirect Memory Offset ............................................................................................................. 117 Table 16. “All Ports Dropped Packet” MIB Counters Format ..................................................................................................... 117 Table 17. “All Ports Dropped Packet” MIB Counters Indirect Memory Offsets .......................................................................... 117 Table 18. Static MAC Table Format (8 Entries)......................................................................................................................... 119 Table 19. Dynamic MAC Address Table Format (1024 Entries)................................................................................................ 120 Table 20. VLAN Table Format (16 Entries) ............................................................................................................................... 121 Table 21. Maximum Ratings...................................................................................................................................................... 122 Table 22. Operating Ratings...................................................................................................................................................... 122 Table 23. Electrical Characteristics ........................................................................................................................................... 123 Table 24. Asynchronous Cycle (ADSN = 0) Timing Parameters ............................................................................................... 124 Table 25. Asynchronous Cycle using ADSN Timing Parameters .............................................................................................. 125 Table 26. Asynchronous Cycle using DATACSN Timing Parameters ....................................................................................... 126 Table 27. Address Latching Timing Parameters........................................................................................................................ 127 Table 28. Synchronous Burst Write Timing Parameters............................................................................................................ 128 Table 29. Synchronous Burst Read Timing Parameters ........................................................................................................... 129 Table 30. Synchronous Write (VLBUSN = 0) Timing Parameters ............................................................................................. 130 Table 31. Synchronous Read (VLBUSN = 0) Timing Parameters ............................................................................................. 131 Table 32. EEPROM Timing Parameters.................................................................................................................................... 132 Table 33. Auto Negotiation Timing Parameters......................................................................................................................... 133 Table 34. Reset Timing Parameters.......................................................................................................................................... 134 Table 35. Transformer Selection Criteria................................................................................................................................... 135 Table 36. Qualified Single Port Magnetic .................................................................................................................................. 135 Table 37. Typical Reference Crystal Characteristics................................................................................................................. 135 |
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