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KSZ8842-16MQL Datasheet(PDF) 7 Page - Micrel Semiconductor |
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KSZ8842-16MQL Datasheet(HTML) 7 Page - Micrel Semiconductor |
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7 / 141 page  Micrel, Inc. KSZ8842-16/32 MQL/MVL/MVLI/MBL October 2007 7 M9999-102207-1.9 Bank 48 Port 1 VID Control Register (0x04): P1VIDCR.......................................................................................................101 Bank 48 Port 1 Control Register 3 (0x06): P1CR3 ..............................................................................................................101 Bank 48 Port 1 Ingress Rate Control Register (0x08): P1IRCR...........................................................................................102 Bank 48 Port 1 Egress Rate Control Register (0x0A): P1ERCR .........................................................................................104 Bank 49 Port 1 PHY Special Control/Status, LinkMD (0x00): P1SCSLMD..........................................................................106 Bank 49 Port 1 Control Register 4 (0x02): P1CR4 ..............................................................................................................107 Bank 49 Port 1 Status Register (0x04): P1SR .....................................................................................................................108 Bank 50 Port 2 Control Register 1 (0x00): P2CR1 ..............................................................................................................109 Bank 50 Port 2 Control Register 2 (0x02): P2CR2 ..............................................................................................................109 Bank 50 Port 2 VID Control Register (0x04): P2VIDCR.......................................................................................................109 Bank 50 Port 2 Control Register 3 (0x06): P2CR3 ..............................................................................................................109 Bank 50 Port 2 Ingress Rate Control Register (0x08): P2IRCR...........................................................................................109 Bank 50 Port 2 Egress Rate Control Register (0x0A): P2ERCR .........................................................................................109 Bank 51 Port 2 PHY Special Control/Status, LinkMD (0x00): P2SCSLMD..........................................................................110 Bank 51 Port 2 Control Register 4 (0x02): P2CR4 ..............................................................................................................111 Bank 51 Port 2 Status Register (0x04): P2SR .....................................................................................................................113 Bank 52 Host Port Control Register 1 (0x00): P3CR1 .........................................................................................................114 Bank 52 Host Port Control Register 2 (0x02): P3CR2 .........................................................................................................114 Bank 52 Host Port VID Control Register (0x04): P3VIDCR .................................................................................................115 Bank 52 Host Port Control Register 3 (0x06): P3CR3 .........................................................................................................115 Bank 52 Host Port Ingress Rate Control Register (0x08): P3IRCR .....................................................................................115 Bank 52 Host Port Egress Rate Control Register (0x0A): P3ERCR ....................................................................................115 Banks 53 – 63: Reserved ....................................................................................................................................................115 MIB (Management Information Base) Counters................................................................................................ 116 Format of “All Ports Dropped Packet” MIB Counters ...........................................................................................................117 Additional MIB Information...................................................................................................................................................118 Static MAC Address Table .................................................................................................................................. 119 Static MAC Table Lookup Examples: ..................................................................................................................................119 Dynamic MAC Address Table ............................................................................................................................. 120 Dynamic MAC Address Lookup Example: ...........................................................................................................................120 VLAN Table ........................................................................................................................................................... 121 VLAN Table Lookup Examples: ...........................................................................................................................................121 Absolute Maximum Ratings (1) ............................................................................................................................. 122 Operating Ratings (1) ............................................................................................................................................. 122 Electrical Characteristics (1) ................................................................................................................................. 123 Timing Specifications .......................................................................................................................................... 124 Asynchronous Timing without using Address Strobe (ADSN = 0) .......................................................................................124 Asynchronous Timing using Address Strobe (ADSN)..........................................................................................................125 Asynchronous Timing using DATACSN (KSZ8842-32MQL/MVL device only) ....................................................................126 Address Latching Timing for All Modes ...............................................................................................................................127 Synchronous Timing in Burst Write (VLBUSN = 1)..............................................................................................................128 Synchronous Timing in Burst Read (VLBUSN = 1)..............................................................................................................129 Synchronous Write Timing (VLBUSN = 0) ...........................................................................................................................130 Synchronous Read Timing (VLBUSN = 0)...........................................................................................................................131 EEPROM Timing .................................................................................................................................................................132 Auto Negotiation Timing ......................................................................................................................................................133 Reset Timing .......................................................................................................................................................................134 Selection of Isolation Transformers................................................................................................................... 135 Selection of Reference Crystal ........................................................................................................................... 135 Package Information ............................................................................................................................................ 136 Acronyms and Glossary...................................................................................................................................... 139 |
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