Part Name
         Description
K7Z163688B

 512Kx36 & 256Kx72 DLW(Double Late Write) RAM ( 20 Page)


SAMSUNG
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512Kx36 & 256Kx72 DLW(Double Late Write) RAM
- 9 -
Rev 0.1
Mar. 2003
K7Z167288B
Preliminary
K7Z163688B
TRUTH TABLES
WRITE TRUTH TABLE(x36)
Notes : 1. X means "Don
′t Care".
2. All inputs in this table must meet setup and hold time around the rising edge of CLK(
↑).
WE
BW a
BW b
BWc
BWd
OPERATION
H
X
X
X
X
READ
L
L
H
H
H
WRITE BYTE a
L
H
L
H
H
WRITE BYTE b
L
H
H
L
H
WRITE BYTE c
L
H
H
H
L
WRITE BYTE d
L
L
L
L
L
WRITE ALL BYTEs
L
H
H
H
H
WRITE ABORT/NOP
Note:
1. X=Don’t Care, H=High, L=Low.
2. E=T(True) if E2= active and E3=active; E=F(False) if E2=inactive or E3=inactive .
3. " * " indicates that the DQ input requirement / output state and CQ output state are determined by the previous operation.
4. BWx= F(False) if all Byte Write Enable pins are high. B Wx=T(True) if any one Byte Write Enable pin is low.
5. DQs are tri-state in response to Bank Deselect, Deselect, and Write commands .
6. Deassertion of E1 does not deactive the echo clock outputs( CQ1, CQ1 , CQ2, CQ2 ).
Echo clock outputs are tri-stated in response to Bank Deselect Commands only.
Previous
Cycle
Input
Type
E1
(tn)
E
(tn)
ADV
(tn)
WE
(tn)
BW x
(tn)
Current Operation
Address
DQ/CQ
(tn)
DQ/CQ
(tn+1)
Notes
N/A
D
H
T
L
X
X
Deselect Cycle
None
*
Hi-Z/CQ
4
Deselect
C
X
X
H
X
X
Deselect Cycle, Continue
Next
Hi-Z/CQ
Hi-Z/CQ
4
N/A
D
X
F
L
X
X
Bank Deselect Cycle
None
*
Hi-Z
4, 5
Bank Deselect
C
X
X
H
X
X
Bank Deselect Cycle, Continue
Next
Hi-Z
Hi-Z
4 , 5
N/A
R
L
T
L
H
X
Read Cycle, Begin Burst
External
*
Q/CQ
2
Read
C
X
X
H
X
X
Read Cycle, Continue Burst
Next
Q /CQ
Q/CQ
N/A
W
L
T
L
L
X
Write Cycle, Begin Burst
External
*
D/CQ
2, 3
N/A
W
L
T
L
L
F
Non-Write Cycle, Begin Burst
External
*
*
2, 3
Write
C
X
X
H
X
T
Write Cycle, Continue Burst
Next
D/CQ
D/CQ
3
Write
C
X
X
H
X
F
Non-Write Cycle, Continue Burst
Next
*
D/CQ
3, 4, 5
WRITE TRUTH TABLE(x72)
Notes : 1. X means "Don
′t Care".
2. All inputs in this table must meet setup and hold time around the rising edge of CLK(
↑).
WE
BW a
BW b
BWc
BWd
BWe
BW f
BW g
BWh
OPERATION
H
X
X
X
X
X
X
X
X
READ
L
L
H
H
H
H
H
H
H
WRITE BYTE a
L
H
L
H
H
H
H
H
H
WRITE BYTE b
L
H
H
L
H
H
H
H
H
WRITE BYTE c
L
H
H
H
L
H
H
H
H
WRITE BYTE d
L
H
H
H
H
L
H
H
H
WRITE BYTE e
L
H
H
H
H
H
L
H
H
WRITE BYTE f
L
H
H
H
H
H
H
L
H
WRITE BYTE g
L
H
H
H
H
H
H
H
L
WRITE BYTE h
L
L
L
L
L
L
L
L
L
WRITE ALL BYTEs
L
H
H
H
H
H
H
H
H
WRITE ABORT/NOP



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