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K7K3218T2C Datasheet(PDF) 11 Page - Samsung semiconductor |
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K7K3218T2C Datasheet(HTML) 11 Page - Samsung semiconductor |
11 / 19 page 1Mx36 & 2Mx18 DDRII+ CIO b2 SRAM K7K3236T2C K7K3218T2C - 11 - Rev. 1.3 August 2008 DC ELECTRICAL CHARACTERISTICS (VDD=1.8V ±0.1V, TA=0°C to +70°C) Notes: 1. Minimum cycle. IOUT=0mA. 2. |IOH|=(VDDQ/2)/(RQ/5) ±15% for 175Ω ≤ RQ ≤ 350Ω. |IOL|=(VDDQ/2)/(RQ/5)±15% for 175Ω ≤ RQ ≤ 350Ω. 3. Minimum Impedance Mode when ZQ pin is connected to VDD. 4. Operating current is calculated with 100% read cycles or 100% write cycles. 5. Standby Current is only after all pending read and write burst opeactions are completed. 6. Programmable Impedance Mode. PARAMETER SYMBOL TEST CONDITIONS MIN MAX UNIT NOTES Input Leakage Current IIL VDD=Max ; VIN=VSS to VDDQ -2 +2 µA Output Leakage Current IOL Output Disabled, -2 +2 µA Operating Current (x36): DDR ICC VDD=Max , IOUT=0mA Cycle Time ≥ tKHKH Min -40 - 900 mA 1,4 -33 - 800 Operating Current (x18): DDR ICC VDD=Max , IOUT=0mA Cycle Time ≥ tKHKH Min -40 - 900 mA 1,4 -33 - 700 Standby Current(NOP): DDR ISB1 Device deselected, IOUT=0mA, f=Max, All Inputs ≤0.2V or ≥ VDD-0.2V -40 - 350 mA 1,5 -33 - 300 Output High Voltage VOH1 VDDQ/2-0.12 VDDQ/2+0.12 V 2,6 Output Low Voltage VOL1 VDDQ/2-0.12 VDDQ/2+0.12 V 2,6 Output High Voltage VOH2 IOH=-1.0mA VDDQ-0.2 VDDQ V3 Output Low Voltage VOL2 IOL=1.0mA VSS 0.2 V 3 |
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