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TLV70225DSET Datasheet(PDF) 2 Page - Texas Instruments |
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TLV70225DSET Datasheet(HTML) 2 Page - Texas Instruments |
2 / 26 page TLV702xx SLVSAG6B – SEPTEMBER 2010 – REVISED FEBRUARY 2011 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION(1) PRODUCT VOUT (2) TLV702xx(x)Pyyyz XX(X) is the nominal output voltage. For output voltages with a resolution of 100 mV, two digits are used in the ordering number; otherwise, three digits are used (for example, 28 = 2.8 V; 475 = 4.75 V). P is optional; devices with P have an LDO regulator with an active output discharge. YYY is the package designator. Z is package quantity. Use "R" for reel (3000 pieces), and "T" for tape (250 pieces). (1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or visit the device product folder at www.ti.com. (2) Output voltages from 1.2 V to 4.8 V in 50-mV increments are available. Contact factory for details and availability. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) VALUE UNIT MIN MAX IN –0.3 +6.0 V Voltage(2) EN –0.3 +6.0 V OUT –0.3 +6.0 V Current (source) OUT Internally Limited Output short-circuit duration Indefinite Operating virtual junction, TJ –55 +150 °C Temperature Storage, Tstg –55 +150 °C Human Body Model (HBM) QSS 009-105 (JESD22-A114A) 2 kV Electrostatic Discharge Rating(3) Charge Device Model (CDM) QSS 009-147 500 V (JESD22-C101B.01) (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods my affect device reliability. (2) All voltages are with respect to network ground terminal. (3) ESD testing is performed according to the respective JESD22 JEDEC standard. DISSIPATION RATINGS (1) PACKAGE RθJA TA < +25°C TA = +70°C TA = +85°C DBV 200 °C/W 500mW 275mW 200mW DSE 180 °C/W 555mW 305mW 222mW (1) For board details, see the Thermal Information section. 2 Submit Documentation Feedback © 2010–2011, Texas Instruments Incorporated |
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