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K7A801809B Datasheet(PDF) 6 Page - Samsung semiconductor |
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K7A801809B Datasheet(HTML) 6 Page - Samsung semiconductor |
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6 / 19 page  K7A801809B 256Kx36 & 512Kx18 Synchronous SRAM - 6 - K7A803609B Rev. 5.0 April 2006 PIN CONFIGURATION(TOP VIEW) PIN NAME Notes : 1. A0 and A1 are the two least significant bits(LSB) of the address field and set the internal burst counter if burst is desired. 2. The pin 42 is reserved for address bit for the 16Mb . SYMBOL PIN NAME TQFP PIN NO. SYMBOL PIN NAME TQFP PIN NO. A0 - A18 ADV ADSP ADSC CLK CS1 CS2 CS2 WEx OE GW BW ZZ LBO Address Inputs Burst Address Advance Address Status Processor Address Status Controller Clock Chip Select Chip Select Chip Select Byte Write Inputs Output Enable Global Write Enable Byte Write Enable Power Down Input Burst Mode Control 32,33,34,35,36,37,43 44,45,46,47,48,49,50 80,81,82,99,100 83 84 85 89 98 97 92 93,94 86 88 87 64 31 VDD VSS N.C. DQa0 ~ a7 DQb0 ~ b7 DQPa, Pb VDDQ VSSQ Power Supply(+3.3V) Ground No Connect Data Inputs/Outputs Output Power Supply (2.5V or 3.3V) Output Ground 15,41,65,91 17,40,67,90 1,2,3,6,7,14,16,25,28,29, 30,38,39,42,51,52,53,56, 57,66,75,78,79,95,96 58,59,62,63,68,69,72,73 8,9,12,13,18,19,22,23 74,24 4,11,20,27,54,61,70,77 5,10,21,26,55,60,71,76 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 100 Pin TQFP N.C. N.C. N.C. VDDQ VSSQ N.C. N.C. DQb0 DQb1 VSSQ VDDQ DQb2 DQb3 N.C. VDD N.C. VSS DQb4 DQb5 VDDQ VSSQ DQb6 DQb7 DQPb N.C. VSSQ VDDQ N.C. N.C. N.C. 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 N.C. N.C. VDDQ VSSQ N.C. DQPa DQa7 DQa6 VSSQ VDDQ DQa5 DQa4 VSS N.C. VDD ZZ DQa3 DQa2 VDDQ VSSQ DQa1 DQa0 N.C. N.C. VSSQ VDDQ N.C. N.C. N.C. K7A801809B(512Kx18) A10 (20mm x 14mm) |
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