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CY26121ZC-3T Datasheet(PDF) 4 Page - Cypress Semiconductor

Part # CY26121ZC-3T
Description  PacketClock??Spread Spectrum Clock Generator
Download  7 Pages
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY26121ZC-3T Datasheet(HTML) 4 Page - Cypress Semiconductor

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CY26121
Document #: 38-07350 Rev. *A
Page 4 of 7
Voltage and Timing Definitions
Figure 2. Duty Cycle Definition
Figure 3. ER = (0.6 x VDD) /t3, EF = (0.6 x VDD) /t4
AC Electrical Specifications [3]
Parameter
Description
Condition
Min
Typ.
Max
Unit
DC
Output Duty Cycle
Duty Cycle is defined in Figure 2, 50% of VDD
45
50
55
%
ER
Rising Edge Rate
Output Clock Edge Rate, Measured from 20% to
80% of VDD, CLOAD = 15 pF See Figure 3.
0.8
1.4
V/ns
EF
Falling Edge Rate
Output Clock Edge Rate, Measured from 80% to
20% of VDD, CLOAD = 15 pF See Figure 3.
0.8
1.4
V/ns
tj
RMS Clock Cycle-to-Cycle
Jitter
RMS cycle-to-cycle jitter with Spread on.
Measured at VDD/2.
15
40
ps
Clock
Output
V
DD
50% of V
DD
0V
t
1
t
2
Clock
Output
t
3
t
4
V
DD
80% of V
DD
20% of V
DD
0V
Note
3. Guaranteed by Characterization, not 100% tested.
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