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SL811HS Datasheet(PDF) 1 Page - Cypress Semiconductor |
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SL811HS Datasheet(HTML) 1 Page - Cypress Semiconductor |
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1 / 32 page  SL811HS Embedded USB Host/Slave Controller Cypress Semiconductor Corporation • 198 Champion Court • San Jose , CA 95134-1709 • 408-943-2600 Document 38-08008 Rev. *F Revised March 25, 2011 Features ■ First USB Host/Slave controller for embedded systems in the market with a standard microprocessor bus interface ■ Supports both full speed (12 Mbps) and low speed (1.5 Mbps) USB transfer in both master and slave modes ■ Conforms to USB Specification 1.1 for full- and low speed ■ Operates as a single USB host or slave under software control ■ Automatic detection of either low- or full speed devices ■ 8-bit bidirectional data, port I/O (DMA supported in slave mode) ■ On-chip SIE asnd USB transceivers ■ On-chip single root HUB support ■ 256-byte internal SRAM buffer ■ Ping-pong buffers for improved performance ■ Operates from 12 or 48 MHz crystal or oscillator (built-in DPLL) ■ 5 V-tolerant interface ■ Suspend/resume, wake up, and low-power modes are supported ■ Auto-generation of SOF and CRC5/16 ■ Auto-address increment mode, saves memory READ/WRITE cycles ■ Development kit including source code drivers is available ■ 3.3 V power source, 0.35 micron CMOS technology ■ Available in 48-pin TQFP package Introduction The SL811HS is an Embedded USB Host/Slave Controller capable of communicating in either full speed or low speed. The SL811HS interfaces to devices such as microprocessors, micro- controllers, DSPs, or directly to a variety of buses such as ISA, PCMCIA, and others. The SL811HS USB Host Controller conforms to USB Specification 1.1. The SL811HS incorporates USB Serial Interface functionality along with internal full or low speed transceivers. The SL811HS supports and operates in USB full speed mode at 12 Mbps, or in low speed mode at 1.5 Mbps. When in host mode, the SL811HS is the master and controls the USB bus and the devices that are connected to it. In peripheral mode, otherwise known as a slave device, the SL811HS operates as a variety of full- or low speed devices. The SL811HS data port and microprocessor interface provide an 8-bit data path I/O or DMA bidirectional, with interrupt support to allow easy interface to standard microprocessors or microcon- trollers such as Motorola or Intel CPUs and many others. The SL811HS has 256-bytes of internal RAM which is used for control registers and data buffer. The available lead-free package is a 48-pin (SL811HST-AXC) package. All packages operate at 3.3 VDC. The I/O interface logic is 5 V-tolerant. X1 X2 D + D- INTR nW R nRD nCS nRST D0-7 GENERATOR USB Root HUB XCVRS SERIAL INTERFACE ENGINE 256 Byte RAM BUFFERS CONTROL REGISTERS INTERRUPT CLOCK & CONTROLLER PROCESSOR INTERFACE M aster/Slave Controller nDRQ nDACK DMA Interface Logic Block Diagram [+] Feedback |
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