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CYONSLENS2000-C Datasheet(PDF) 4 Page - Cypress Semiconductor |
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CYONSLENS2000-C Datasheet(HTML) 4 Page - Cypress Semiconductor |
4 / 36 page CYONS2110 Document Number: 001-44048 Rev. *G Page 4 of 36 Figure 2. Block Diagram SRAM Interrupt Controller Sleep and Watchdog Multiple Clock Sources 32 kHz Internal Low Speed Oscillator (ILO) 6/12/24 MHz Internal Main Oscillator (IMO) PSoC CORE CPU Core (M8C) Supervisory ROM (SROM) Flash Nonvolatile Memory SYSTEM RESOURCES SYSTEM BUS SYSTEM BUS Port 2 Port 1 Port 0 Global Analog Interconnect 1.8V Analog Regulator SPI Master/ Slave POR and LVD Full Speed USB System Resets Internal Voltage References Three 16-Bit Programmable Timers PSoC Core Regulator Digital Clocks CapSense System OptiCheckTM Navigation System Ovation II Power System VCSEL Laser Control DSP Resolution Control Boost Regulator 3.3V Regulator POWER BUS Power Control Battery Filter Port 3 NOTE: Shaded blocks indicate optional functions - Refer to OvationONS TM II Family Performance Table for details I2C Slave ADC [+] Feedback [+] Feedback |
Similar Part No. - CYONSLENS2000-C |
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Similar Description - CYONSLENS2000-C |
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