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CY7C65621-56LTXC Datasheet(PDF) 8 Page - Cypress Semiconductor |
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CY7C65621-56LTXC Datasheet(HTML) 8 Page - Cypress Semiconductor |
8 / 27 page CY7C65621/31 Document #: 001-52934 Rev. *C Page 8 of 27 Pin Description Table x Table 3. Pin Assignments[4] Pin CY7C65631 Name CY7C65621 Name Type Default Description 3 VCC VCC Power N/A VCC. This signal provides power to the chip. 7 VCC VCC Power N/A VCC. This signal provides power to the chip. 11 VCC VCC Power N/A VCC. This signal provides power to the chip. 15 VCC VCC Power N/A VCC. This signal provides power to the chip. 19 VCC VCC Power N/A VCC. This signal provides power to the chip. 23 VCC VCC Power N/A VCC. This signal provides power to the chip. 27 VCC VCC Power N/A VCC. This signal provides power to the chip. 33 VCC VCC Power N/A VCC. This signal provides power to the chip. 39 VCC VCC Power N/A VCC. This signal provides power to the chip. 55 VCC VCC Power N/A VCC. This signal provides power to the chip. 4 GND GND Power N/A GND. Connect to ground with as short a path as possible. 8 GND GND Power N/A GND. Connect to ground with as short a path as possible. 12 GND GND Power N/A GND. Connect to ground with as short a path as possible. 16 GND GND Power N/A GND. Connect to ground with as short a path as possible. 20 GND GND Power N/A GND. Connect to ground with as short a path as possible. 24 GND GND Power N/A GND. Connect to ground with as short a path as possible. 28 GND GND Power N/A GND. Connect to ground with as short a path as possible. 34 GND GND Power N/A GND. Connect to ground with as short a path as possible. 40 GND GND Power N/A GND. Connect to ground with as short a path as possible. 47 GND GND Power N/A GND. Connect to ground with as short a path as possible. 50 GND GND Power N/A GND. Connect to ground with as short a path as possible. 56 GND GND Power N/A GND. Connect to ground with as short a path as possible. 21 XIN XIN Input N/A 24 MHz Crystal IN or external Clock Input. 22 XOUT XOUT Output N/A 24 MHz Crystal OUT. (NC if external clock is used) 46 RESET# RESET# Input N/A Active LOW Reset. This pin resets the entire chip. It is normally tied to VCC through a 100K resistor, and to GND through a 0.1 µF capacitor. Other than this, no other special power up procedure is required. 45 SELFPWR SELFPWR Input N/A Self Power. Indicator for bus or self powered. 0 is bus powered, 1 is self powered. 26 VBUSPOWER VBUSPOWER Input N/A VBUS. Connect to the VBUS pin of the upstream connector. This signal indicates to the hub that it is in a connected state, and may enable the D+ pull up resistor to indicate a connection. (The hub does so after the external EEPROM is read). SPI Interface 25 SPI_CS SPI_CS Output O SPI Chip Select. Connect to CS pin of the EEPROM. 48 SPI_SCK SPI_SCK Output O SPI Clock. Connect to EEPROM SCK pin. 49 SPI_SD SPI_SD I/O/Z Z SPI Dataline Connect to GND with 15 K Ω resistor and to the Data I/O pin of the EEPROM. Upstream Port 17 D– D– I/O/Z Z Upstream D– Signal. 18 D+ D+ I/O/Z Z Upstream D+ Signal. [+] Feedback |
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