CY7C1354C, CY7C1356C

Document Number: 38-05538 Rev. *K

Page 11 of 32

Partial Write Cycle Description

The following table lists the Partial Write Cycle Description for CY7C1356C.[10, 11, 12, 13]

Function (CY7C1356C)

WE

Read

Hx

x

Write – no bytes written

L

H

H

Write byte a

LHL

LL

H

Write both bytes

L

L

L

Notes

10. X = “Don't Care”, H = Logic HIGH, L = Logic LOW, CE stands for all chip enables active. BWx = L signifies at least one bytewrite select is active, BWx = valid signifies

that the desired byte write selects are asserted, see Write Cycle Description table for details.

11. Write is defined by WE and BWX. See Write Cycle Description table for details.

12. When a write cycle is detected, all I/Os are tri-stated, even during byte writes.

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