CY62148DV30

Document Number : 38-05341 Rev. *F

Page 7 of 13

Figure 2. Read Cycle No. 2 (OE Controlled)[15, 16]

Figure 3. Write Cycle No. 1 (WE Controlled)[17, 18]

50%

50%

DATA VALID

HIGH IMPEDANCE

IMPEDANCE

HIGH

DATA OUT

OE

CE

SUPPLY

CURRENT

ADDRESS

DATA I/O

ADDRESS

CE

WE

OE

NOTE 19

Notes

15. WE is HIGH for read cycle.

16. Address valid prior to or coincident with CE transition LOW.

18. If CE goes HIGH simultaneously with WE HIGH, the output remains in high-impedance state.

19. During this period, the I/Os are in output state and input signals should not be applied.

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