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CY62138EV30LL-45BVXI Datasheet(PDF) 5 Page - Cypress Semiconductor

Part # CY62138EV30LL-45BVXI
Description  2 Mbit (256K x 8) MoBL Static RAM
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY62138EV30LL-45BVXI Datasheet(HTML) 5 Page - Cypress Semiconductor

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CY62138EV30 MoBL®
Document #: 38-05577 Rev. *C
Page 5 of 12
Capacitance
Parameter[9]
Description
Test Conditions
Max
Unit
CIN
Input capacitance
TA = 25 °C, f = 1 MHz,
VCC = VCC(typ.)
10
pF
COUT
Output capacitance
10
pF
Thermal Resistance
Parameter[9]
Description
Test Conditions
BGA
Unit
JA
Thermal resistance
(junction to ambient)
Still air, soldered on a 3 × 4.5 inch,
four-layer printed circuit board
72
C / W
JC
Thermal resistance
(junction to case)
8.86
C / W
Figure 1. AC Test Loads and Waveforms
Parameters
2.50 V
3.0 V
Unit
R1
16667
1103
R2
15385
1554
RTH
8000
645
VTH
1.20
1.75
V
Data Retention Characteristics (Over the Operating Range)
Parameter
Description
Conditions
Min
Typ[10]
Max
Unit
VDR
VCC for data retention
1
V
ICCDR [11]
Data retention current
VCC = 1V, CE > VCC 0.2 V,
VIN > VCC 0.2 V or VIN < 0.2 V
–0.8
3
A
tCDR[9]
Chip deselect to data retention time
0
ns
tR[12]
Operation recovery time
45
ns
VCC
VCC
OUTPUT
R2
30 pF
INCLUDING
JIG AND
SCOPE
GND
90%
10%
90%
10%
OUTPUT
VTH
Equivalent to: THÉVENIN EQUIVALENT
ALL INPUT PULSES
RTH
R1
Fall time: 1 V/ns
Rise Time: 1 V/ns
Data Retention Waveform
Notes
9. Tested initially and after any design or process changes that may affect these parameters.
10. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ), TA = 25 °C
11. Chip enable (CE) must be tied to CMOS levels to meet the ISB1 / ISB2 / ICCDR specification. Other inputs can be left floating.
12. Full device AC operation requires linear VCC ramp from VDR to VCC(min.) > 100 s or stable at VCC(min.)  100 s.
1.5 V
tCDR
VDR > 1.5 V
DATA RETENTION MODE
tR
CE
VCC
VCC (min.)
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