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LC74772V Datasheet(PDF) 7 Page - Sanyo Semicon Device |
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LC74772V Datasheet(HTML) 7 Page - Sanyo Semicon Device |
7 / 16 page x COMMAND 0 (System control setup 1) First byte Notes on command settings 1. RSTSYS: A command reset is executed immediately after the data is read. The reset is cleared by returning the CS pin to high to reset this register. The reset is also cleared if this command is executed consecutively or if this register is set to 0. 2. RAMCLR: The RAM can only be erased when display is off. This operation is not executed during display. This operation cannot be executed if the LC oscillator is stopped. Only use this command when the LC oscillator is operating. • This command bit is automatically cleared when the RAM erase operation completes. • Once the RAM erase command has been read in, the following time is required to complete the operation. — Tclear = 5 [µs] + 4/fOSC (LC-oscillator) × 288 3. OSCSTP: The LC oscillator stop command stops the LC oscillator connected to pins 2 and 3 (OSCIN and OSCOUT). The oscillator stop command is only executed when display is off. It is not executed if display is in progress. • In external clock input mode, this command stops the acquisition of that clock signal. 4. TSTMOD: The test mode command is executed if the TESTIN pin (pin 5) is high. This command should not be used by applications in normal operation. Note: This register is set to 0 on a reset (either by the RST pin or by a command reset). No. 5159-7/16 LC74772V Register content DA0 to DA7 Register name State Function Note 7 — 0 6 — 0 Command 0 identification code 5 — 0 4 — 0 3 RST 0 Normal operation If CS is low, the reset is executed, but if SYS 1 System reset CS is high this command will be excluded. RAM 0 Normal operation The VRAM clear operation is not 2 executed when the oscillator CLR 1 Normal operation VRAM clear (All data is set to FE (hexadecimal)) is stopped. OSC 0 The LC oscillator operating state is maintained. Valid when the display is off. VRAM write 1 is not possible when the oscillator is STP 1 The LC oscillator is stopped. stopped. 0 TST 0 Normal operation Illegal setting. MOD 1 Test mode This bit must always be set to 0. |
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