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LC74725 Datasheet(PDF) 2 Page - Sanyo Semicon Device |
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LC74725 Datasheet(HTML) 2 Page - Sanyo Semicon Device |
2 / 16 page No. 5213-2/16 LC74725, 74725M Pin Assignment Pin Functions Note: Both VDD1 pins must be connected to the power supply. Pin No. Symbol Function Description 1 VSS1 Ground Ground connection (digital system ground) 2 XtalIN Connections for the external crystal and capacitors used to form a crystal oscillator for internal Crystal oscillator synchronizing signal generation. Alternatively, these pins can be used for external clock input 3 XtalOUT (2fsc or 4fsc). 4 CTRL1 Crystal oscillator input Switches between external clock input mode and crystal oscillator mode. Low: crystal oscillator switching mode, high: external clock input mode. 5 LN21 Data output Line 21H pulse output (MOD0 = low: even field, MOD0 = high: both fields output) 6 OSCIN LC oscillator Connections for the external coil and capacitor used to form the character output dot clock 7 OSCOUT generation oscillator. Outputs the judgment as to where there are or are not external synchronizing signals present. Outputs a high level when there are synchronizing signals. External synchronizing SEL0 = high: Outputs field discrimination pulses (O/E pulses) 8 SYNCJDG signal judgment output Outputs the dot clock (LC oscillator) when the CS1 pin is high and the RST pin is low. A command is provided that turns this output off. Outputs the crystal oscillator clock when the CS1 pin is low and the RST pin is low. A command is provided that turns this output off. 9 CS1 Enable input Enable input for OSD serial data input. Serial data input is enabled when this pin is low. A pull- up resistor is built in (hysteresis input). 10 SCLK Clock input Serial data input clock input. A pull-up resistor is built in (hysteresis input). 11 SIN Data input Serial data input. A pull-up resistor is built in (hysteresis input). 12 VDD2 Power supply Composite video signal level adjustment power supply (analog system power supply) 13 CVOUT Video signal output Composite video signal output pin 14 NC Must be either connected to ground or left open. 15 CVIN Video signal input Composite video signal input pin 16 VDD1 Power supply Power supply (+5 V: digital system power supply) 17 SYNIN Sync separator circuit input Video signal input to the built-in sync separator circuit 18 VSS1 Ground Ground (digital system ground) 19 SEPOUT Composite synchronizing Video signal output from the built-in sync separator circuit signal output Vertical synchronizing Inputs the vertical synchronizing signal generated by integrating the SEPOUT pin output signal. 20 SEPIN signal input An integrating circuit must be inserted between the SEPOUT pin and this pin. This pin must be tied to VDD1 if unused. 21 CS2 Enable input Enable input for EDS data output. EDS data output is enabled when this input is low. A pull-up resistor is built in (hysteresis input). 22 CPDT Data output EDS data output (either an n-channel open-drain or a CMOS output circuit) 23 RST Reset input System reset input. A pull-up resistor is built in (hysteresis input). 24 VDD1 Power supply (+5 V) Power supply (+5 V: digital system power supply) |
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