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SX8801RIxxx Datasheet(PDF) 5 Page - Semtech Corporation |
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SX8801RIxxx Datasheet(HTML) 5 Page - Semtech Corporation |
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5 / 135 page  © Semtech 2005 www.semtech.com 1-3 XE8801A – SX8801R The counters/timers/PWM can take its clocks from internal or external sources (on Port A) and can generate interrupts or events. The PWM is output on Port B. The VLD (voltage level detector) detects the battery end of life with respect to a programmable threshold. INSTRUCTION MEMORY B U S C O N T R O L L E R TEST CONTROLLER RESET BLOCK WD CLOCK GENERATION/ POWER MANAGEMENT VREG XTAL RC CPU COOLRISC816 8X8 MULTIPLIER 16 CPU REGISTERS IRQ HANDLING EVN HANDLING PORT B 8 DATA REGISTERS PORT A USRT PORT C address control datain dataout reset control clocks test control irq evn VPP/TEST VBAT VSS RESET OSCIN OSCOUT VREG PB(7:0) PA(7:0) PC(7:0) AC_R(3:0) AC_A(7:0) VMULT DATA MEMORY UART COUNTERS TIMERS PWM VLD POR ACQUISITION CHAIN ZoomingADC VMULT Figure 1-1. Block schematic of the XE8801A circuit. |
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