Electronic Components Datasheet Search |
|
SY89837U Datasheet(PDF) 5 Page - Micrel Semiconductor |
|
SY89837U Datasheet(HTML) 5 Page - Micrel Semiconductor |
5 / 14 page 5 Precision Edge® SY89837U Micrel, Inc. M9999-060410 hbwhelp@micrel.com or (408) 955-1690 Case #2 Input Clock Failure: Switching from a selected clock stuck HIGH to a valid clock (RPE enabled). If CLK1 fails HIGH before the RPE MUX selects CLK2 (using the SEL pin), the switchover will occur in three stages: • Stage 1: The output will remain HIGH for a limited number of pulses of CLK2. • Stage 2: The output will switch to LOW and then remain LOW for a limited number of falling edges of CLK2. • Stage 3: The output will follow CLK2. Case #3 Input Clock Failure: Switching from a selected clock stuck LOW to a valid clock (RPE enabled). If CLK1 fails LOW before the RPE MUX selects CLK2 (using the SEL pin), the switchover will occur in two stages. • Stage 1: The output will remain LOW for a lim- ited number of falling edges of CLK2. • Stage 2: The output will follow CLK2. Figure3. TimingDiagram2(1) Note: 1. Output shows extended clock cycle during switchover. Pulse width for both high and low of this cycle will always be greater than 50% of the CLK2 period. Figure4. TimingDiagram3 |
Similar Part No. - SY89837U_10 |
|
Similar Description - SY89837U_10 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |