Micrel, Inc.

SY89833AL

March 2009

6

M9999-032609-A

AC Electrical Characteristics

(7)

Symbol

Parameter

Condition

Min

Typ

Max

Units

Maximum Frequency

2.0

GHz

Propagation Delay

250

470

ps

Note 8

5

20

ps

Within-Device Skew

Part-to-Part Skew

Note 9

200

ps

Set-Up Time

Note 10

400

ps

Hold Time

Note 10

400

ps

Data

Random Jitter (RJ)

Deterministic Jitter (DJ)

Note 11

Note 12

1

10

Clock

Cycle-to-Cycle Jitter

Total Jitter (TJ)

Note 13

Note 14

1

10

f = 622.08MHz, Note 15

0.07

Additive Phase Jitter

f = 156.25MHz, Note 15

0.635

Output Rise/Fall Times

(20% to 80%)

At full output swing.

60

110

190

ps

Duty Cycle

Differential I/O

47

53

%

Notes:

7.

High-frequency AC parameters are guaranteed by design and characterization.

8.

Within device skew is measured between two different outputs under identical input transitions.

9.

Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and no skew at the edges at the respective

inputs.

10. Set-up and hold times apply to synchronous applications that intend to enable/disable before the next clock cycle. For asynchronous applications,

set-up and hold times do not apply.

11. Random jitter is measured with a K28.7 pattern, measured at ≤fMAX.

12. Deterministic jitter is measured at 2.5Gbps with both K28.5 and 223–1 PRBS pattern.

13. Cycle-to-cycle jitter definition: The variation period between adjacent cycles over a random sample of adjacent cycle pairs. tJITTER_CC = Tn –

Tn+1, where T is the time between rising edges of the output signal.

14. Total jitter definition: with an ideal clock input frequency of ≤ fMAX (device), no more than one output edge in 1012 output edges will deviate by

more than the specified peak-to-peak jitter value.

15. Integrated over the range of 12kHz to 20MHz.

Timing Diagrams