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SY58040UMITR Datasheet(PDF) 6 Page - Micrel Semiconductor

Part # SY58040UMITR
Description  ULTRA PRECISION 4 X 4 CML SWITCH WITH INTERNAL I/O TERMINATION
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Manufacturer  MICREL [Micrel Semiconductor]
Direct Link  http://www.micrel.com
Logo MICREL - Micrel Semiconductor

SY58040UMITR Datasheet(HTML) 6 Page - Micrel Semiconductor

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SY58040U
Micrel, Inc.
M9999-103009
hbwhelp@micrel.com or (408) 955-1690
VCC = 2.5V ±5% or 3.3V ±10%; TA= –40°C to +85°C, RL = 100Ω across each output pair, unless otherwise stated.
Symbol
Parameter
Condition
Min
Typ
Max
Units
fMAX
Maximum Operating Frequency
NRZ data
5
Gbps
VOUT ≥ 200mV
Clock
3
GHz
tpd
Differential Propagation Delay
IN-to-Q
150
225
350
ps
CONFIG-to-Q
500
ps
tpw
Pulse Width of LOAD/CONFIG signal
1500
ps
∆tpd Tempco Differential Propagation Delay
225
fs/°C
Temperature Coefficient
tS
Set-Up Time
SIN-to-LOAD
800
ps
SOUT-to-LOAD
800
ps
LOAD-to-CONFIG
800
ps
CONFIG-to-LOAD
950
ps
tH
Hold Time
LOAD-to-SIN, LOAD-to-SOUT
800
ps
tSKEW
Output-to-Output Skew
Note 9
25
ps
Part-to-Part Skew
Note 10
150
ps
tJITTER
Data
Random Jitter (RJ)
Note 11
1
psRMS
Deterministic Jitter (DJ)
Note12
10
psPP
Clock
Cycle-to-Cycle Jitter
Note13
1
psRMS
Total Jitter (TJ)
Note 14
10
psPP
Crosstalk-induced Jitter
Note 15
0.7
psRMS
tr, tf
Output Rise/Fall Time
At full output swing, 20% to 80%.
20
40
60
ps
Notes:
8. High-frequency AC-parameters are guaranteed by design and characterization.
9. Output-to-output skew is measured between two different outputs under identical input transitions.
10. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at the
respective inputs
11. Random jitter is measured with a K28.7 character pattern, measured at <fMAX.
12. Deterministic jitter is measured at 2.5Gbps/3.2Gbps, with both K28.5 and 223–1 PRBS pattern.
13. Cycle-to-cycle jitter definition: the variation of periods between adjacent cycles, Tn – Tn-1 where T is the time between rising edges of the output
signal.
14. Total jitter definition: with an ideal clock input of frequency <fMAX, no more than one output edge in 1012 output edges will deviate by more than the
specified peak-to-peak jitter value.
15. Crosstalk induced jitter is defined as the added jitter that results from signals applied to two adjacent channels. It is measured at the output while
applying two similar differential clock frequencies that are asynchronous with respect to each other at the inputs.
AC ELECTRICAL CHARACTERISTICS(8)


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