5

Precision Edge®

SY100S834

SY100S834L

Micrel, Inc.

M9999-111009

hbwhelp@micrel.com or (408) 955-1690

The EN signal will freeze the internal clocks to the flip-flops on the first falling edge of CLK after its assertion. The internal dividers will maintain

their state during the internal clock freeze and will return to clocking once the internal clocks are unfrozen. The outputs will transition to their

next states in the same manner, time and relationship as they would have had the EN signal not been asserted.

TIMING DIAGRAM

CLK

Internal Clock

Disabled

EN