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R5F56217BDBG Datasheet(PDF) 7 Page - Renesas Technology Corp |
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R5F56217BDBG Datasheet(HTML) 7 Page - Renesas Technology Corp |
7 / 25 page RX62N Group and RX621 Group 16-Bit SDRAM Connection and Access Examples R01AN0585EJ0202 Rev.2.02 Page 7 of 22 Feb 14, 2014 4.3 Auto Refresh Settings In this application note, auto refresh is performed for the SDRAM used. Auto refresh must be performed while observing the auto refresh required interval and auto refresh release cycles as stipulated in the SDRAM data sheet. The methods for determining the setting values are shown below. Table 5 lists the setting values used. (1) Auto refresh required interval The auto refresh required interval can be determined with the following formula. RFC (auto refresh required interval setting) = (auto refresh required interval/SDCLK period) – 1 Since the SDRAM used in this application note requires that 4096 auto refresh operations be performed every 64 ms, the auto refresh interval can be determined from the following formula. Auto refresh required interval = 64 ms/4096 = 15.62 µs Also, since the SDRAM clock (SDCLK) frequency used in the application note is 48 MHz, the SDCLK period is 1/48 MHz. Therefore, RFC (auto refresh required interval setting) = (15.62 µs/(1/48 MHz)) – 1 = 749 = 2EDh Therefore the auto refresh required interval setting bits (RFC[11:0]) are set to 2EDh. (2) Auto refresh release cycle Since the auto refresh period (tRFC) for the SDRAM used in this application note is 66 ns (minimum), the auto refresh release cycle must meet the following condition. 66 ns (min) ≤ auto refresh release cycle Since this means that this cycle will be 66 ns/(1/48 MHz) = 3.17 cycles an auto refresh release cycle count of at least 4 cycles is required. Therefore the auto refresh release cycle setting bits (REFW[3:0]) are set to 0011b. Table 5 SDRAM Auto Refresh Control Register (SDRFCR) Bit Name Setting Value Function Auto refresh required interval setting bits (RFC[11:0]) 02EDh 749 cycles Auto refresh cycle/auto refresh release cycle setting bits (REFW[3:0]) 0011b 4 cycles |
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