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ADC1413D125HN Datasheet(PDF) 4 Page - NXP Semiconductors |
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ADC1413D125HN Datasheet(HTML) 4 Page - NXP Semiconductors |
4 / 43 page ADC1413D_SER All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 5 — 9 February 2011 4 of 43 NXP Semiconductors ADC1413D series Dual 14-bit ADC; serial JESD204A interface 6. Pinning information 6.1 Pinning 6.2 Pin description Fig 2. Pinning diagram 005aaa068 ADC1413D Transparent top view DGND INBM INBP DGND VCMB VDDD REFBT CMLPB REFBB CMLNB AGND VDDD CLKM DGND CLKP DGND AGND VDDD REFAB CMLNA REFAT CMLPA VCMA VDDD INAM DGND INAP DGND 14 29 13 30 12 31 11 32 10 33 9 34 8 35 7 36 6 37 5 38 4 39 3 40 2 41 1 42 Table 2. Pin description Symbol Pin Type [1] Description INAP 1 I channel A analog input INAM 2 I channel A complementary analog input VCMA 3 O channel A output common voltage REFAT 4 O channel A top reference REFAB 5 O channel A bottom reference AGND 6 G analog ground CLKP 7 I clock input CLKM 8 I complementary clock input AGND 9 G analog ground REFBB 10 O channel B bottom reference REFBT 11 O channel B top reference VCMB 12 O channel B output common voltage INBM 13 I channel B complementary analog input |
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