No. 5782-7/11

LC4608C

Pad Functions

Pad Name

I/O

Function

Pin Count

CLK

I

Shift register clock input

1

SI0 to SI3

I

Shift register serial data input. SI0 is the least significant bit of the gray scale data; SI3, the most significant bit.

4

LAT

I

Parallel output latch input. high level input converts serial data to parallel data; low level latches the data.

1

3-phase selector inputs. high level input turns on the corresponding output. STB1 controls output bits DO1, DO4,

STB1, 2, 3

I

DO7, DO10,... DO62. STB2 controls output bits DO2, DO5, DO8, DO11,... DO63. STB3 controls output bits DO3,

3

DO6, DO9, DO12,... DO64.

STB4, 5

I

2-phase selector inputs with pull-down register. high level input turns on the corresponding output.

2

STB4 controls the odd bits: DO1, DO3, DO5,... DO63. STB5 controls the even bits: DO2, DO4, DO6,... DO64.

STBCLK

I

External clock signal input for gray scale signal generator

1

LOAD

I

Reset input for 4-bit counter. low level input resets the counter to “0.”

1

COM1

I

Scan voltage signal input, latched when the shift register bit is “1” (DO pin pairs 1, 2, 5, 6,... 57, 58, 61, 62)

2

COM2

I

Scan voltage signal input, latched when the shift register bit is “0” (DO pin pairs 1, 2, 5, 6,... 57, 58, 61, 62)

2

COM3

I

Scan voltage signal input, latched when the shift register bit is “1” (DO pin pairs 3, 4, 7, 8,... 59, 60, 63, 64)

2

COM4

I

Scan voltage signal input, latched when the shift register bit is “0” (DO pin pairs 3, 4, 7, 8,... 59, 60, 63, 64)

2

SO0 to SO3

O

Shift register serial data output. SO0 is the least significant bit of the gray scale data; SO3, the most significant bit.

4

DO1 to DO64

O

Parallel data output. Transmission gate output.

64

—

Power supply for logic circuits (+5 V)

2

GND

—

Ground for logic and level conversion circuits

4

—

Power supply for level conversion circuits +40 V

2