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CY29973 Datasheet(PDF) 1 Page - Cypress Semiconductor |
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CY29973 Datasheet(HTML) 1 Page - Cypress Semiconductor |
1 / 10 page CY29973 3.3 V 125 MHz Multi-Output Zero Delay Buffer Cypress Semiconductor Corporation • 198 Champion Court • San Jose , CA 95134-1709 • 408-943-2600 Document Number: 38-07291 Rev. *E Revised February 5, 2011 3.3 V 125 MHz Multi-Output Zero Delay Buffer Features ■ Output Frequency up to 125 MHz ■ 12 Clock Outputs: Frequency Configurable ■ 350 ps max. Output to Output Skew ■ Configurable Output Disable ■ Two Reference Clock Inputs for Dynamic Toggling ■ Oscillator or PECL Reference Input ■ Spread Spectrum Compatible ■ Glitch-free Output Clocks Transitioning ■ 3.3 V Power Supply ■ Pin Compatible with MPC973 ■ Industrial Temperature Range: –40 °C to +85 °C ■ 52-pin TQFP Package Table 1. Frequency Table[1] VC0_SEL FB_SEL2 FB_SEL1 FB_SEL0 FVC0 00 00 8x 00 01 12x 00 10 16x 00 11 20x 01 00 16x 01 01 24x 01 10 32x 01 11 40x 10 00 4x 10 01 6x 10 10 8x 10 11 10x 11 00 8x 11 01 12x 11 10 16x 11 11 20x Note 1. x = reference input frequency, 200 MHz < FVCO < 480 MHz. [+] Feedback |
Similar Part No. - CY29973_11 |
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Similar Description - CY29973_11 |
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