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LB11870 Datasheet(PDF) 10 Page - Sanyo Semicon Device |
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LB11870 Datasheet(HTML) 10 Page - Sanyo Semicon Device |
10 / 14 page No. 7256 -10/14 LB11870 Continued from preceding page. Pin No. Pin Function Equivalent circuit Phase lock state detection output. This output goes to the on state (low level) when the phase is locked. 29 LD VREG 29 Start/stop control input Low: 0 to 1.5 V High: 3.5 V to VREG Hysteresis: 0.5 V Low: start. This pin goes to the high level when open. 32 S/S VREG 22k Ω 2k Ω 32 Clock input. Low: 0 to 1.5 V High: 3.5 V to VREG Hysteresis: 0.5 V fCLK = 10 kHz (maximum) If noise is a problem, use a capacitor to remove that noise at this input. 33 CLK VREG 22k Ω 2k Ω 33 Deceleration switching control input. Low: 0 to 1.5 V High: 3.5 V to VREG This pin goes to the high level when open. Low: reverse torque control, High: free running. An external Schottky barrier diode is required on the output low side if reverse torque control is used. 34 BRSEL VREG 30k Ω 2k Ω 34 RF waveform smoothing. If noise on the RF waveform is a problem, insert a capacitor between this pin and ground. 35 PH VREG 500 Ω 35 Continued on next page. |
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