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TISP8211MDR-S Datasheet(PDF) 2 Page - Bourns Electronic Solutions

Part # TISP8211MDR-S
Description  COMPLEMENTARY BUFFERED-GATE SCRS
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Manufacturer  BOURNS [Bourns Electronic Solutions]
Direct Link  http://www.bourns.com
Logo BOURNS - Bourns Electronic Solutions

TISP8211MDR-S Datasheet(HTML) 2 Page - Bourns Electronic Solutions

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JANUARY 2006 - REVISED MAY 2007
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP821xMD Overvoltage Protectors
Description
The TISP8210MD / TISP8211MD protector combination has been designed to protect dual polarity supply rail SLICs (Subscriber Line Interface
Circuits) against overvoltages on the telephone line caused by lightning and a.c. power contact and induction. Both devices have been
designed using the latest understanding of programmable protector technology to maximize performance.
The TISP8210MD and TISP8211MD are complementary programmable protection devices. The program or gate pins (G1, G2) are connected to
the positive and negative SLIC battery supplies to give protection which will track the SLIC supply levels. The integrated transistor buffer is an
essential element in this type of device as the current gain of around 150 reduces battery loading to below 5 mA during a.c. power induction or
power contact conditions. Additionally the Base-Emitter junction acts as a reverse blocking diode during operation preventing unnecessary
loading of the power supply.
The TISP8210MD / TISP8211MD combination is designed to be used in conjunction with the 12.5 Ω Bourns® 4A12P-1AH-12R5 Line
Protection Module (LPM). With this solution the application should pass Telcordia GR-1089-CORE testing with the 4A12P-1AH-12R5 acting as
the overcurrent protector and coordination element.
The TISP® device plus LPM solution is designed to work in harmony with the system primary protectors. GR-1089-CORE issue 3 lists test to
allow for three types of primary protection: Carbon Block (1000 V); Gas Discharge Tube (600 V) and Solid State (400 V). This solution is
designed to be used with the GDT and Solid State options. Under lightning conditions the current through the 12.5 Ω LPM will be 48 A (600 V /
12.5 Ω), which is well within the 60 A capability of the TISP8210MD / TISP8211MD combination.
How to Order
Device
Package
Carrier
Order As
Marking Code
Standard Quantity
TISP8210MD
8-SOIC
Embossed Tape Reeled
TISP8210MDR-S
8210M
2500
M
1
1
2
8
S
-
R
D
M
1
1
2
8
P
S
I
T
D
M
1
1
2
8
P
S
I
T
t
i
n
U
e
u
l
a
V
l
o
b
m
y
S
g
n
i
t
a
R
Repetitive peak off-state voltage, VGK
V
0
=
DRM
-120
V
Repetitive peak reverse voltage, VGA
V
V
0
7
-
=
RRM
120
Non-repetitive peak impulse current (see Note 1)
2/10
µs (Telcordia GR-1089-CORE, 2/10 µs voltage wave shape)
5/310
µs (ITU-T K.44, 10/700 µs voltage wave shape used in K.20/21/45)
10/1000
µs (Telcordia GR-1089-CORE, 10/1000 µs voltage wave shape)
IPPSM
-167
-70
-60
A
Non-repetitive peak on-state current, 50/60 Hz (see Notes 1 and 2)
100 ms
1 s
5 s
300 s
900 s
ITSM
-11
-6.5
-3.4
-1.4
-1.3
A
Junction temperature
TJ
-55 to +150
°C
Storage temperature range
Tstg
-65 to +150
°C
NOTES: 1. Initially the protector must be in thermal equilibrium with TJ = 25 °C. The surge may be repeated after the device returns to its initial
conditions.
2. These non-repetitive rated terminal currents are for the TISP8210MD and TISP8211MD together. Device (A)-terminal positive
current values are conducted by the TISP8211MD and (K)-terminal negative current values by the TISP8210MD.
TISP8210MD Absolute Maximum Ratings, TA = 25 °C


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