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FX828D2 Datasheet(PDF) 10 Page - CML Microcircuits |
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FX828D2 Datasheet(HTML) 10 Page - CML Microcircuits |
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10 / 34 page  CTCSS/DCS/SELCALL Processor FX828 © 2009 CML Microsystems Plc 10 D/828/4 Write Only Register Description GENERAL RESET (Hex address $01) The reset command has no data attached to it. It sets the device registers into the specific (all powersaved) states as listed below: REGISTER NAME HEX ADDRESS BIT 7 (D7) BIT 6 (D6) BIT 5 (D5) BIT 4 (D4) BIT 3 (D3) BIT 2 (D2) BIT 1 (D1) BIT 0 D0) SIGNALLING CONTROL $80 0 0 0 0 0 0 0 0 SELCALL & SUB-AUDIO STATUS $81 0 0 0 0 X X X X SIGNALLING SET-UP $82 0 0 0 0 0 0 0 0 CTCSS TX / FAST RX FREQUENCY (1) $83 0 0 0 0 0 0 0 0 CTCSS TX / FAST RX FREQUENCY (2) 0 0 0 0 0 0 0 0 RX TONE PROGRAM (1) $84 0 0 0 0 0 0 0 0 RX TONE PROGRAM (2) 0 0 0 0 0 0 0 0 DCS BYTE 3 $85 0 0 0 0 0 0 0 0 DCS BYTE 2 $86 0 0 0 0 0 0 0 0 DCS BYTE 1 $87 0 0 0 0 0 0 0 0 GENERAL CONTROL $88 0 0 0 0 0 0 0 0 AUDIO CONTROL (1) $8A 0 0 0 0 0 0 0 0 AUDIO CONTROL (2) 0 0 0 0 0 0 0 0 GENERAL PURPOSE TIMER $8B 0 0 0 0 0 0 0 0 SELCALL TX (1) $8D 0 0 0 0 0 0 0 0 SELCALL TX (2) 0 0 0 0 0 0 0 0 IRQ MASK $8E 0 0 0 0 0 0 0 0 IRQ FLAG $8F 0 0 0 0 0 0 0 0 X = undefined SIGNALLING CONTROL Register (Hex address $80) This register is used to control the functions of the device as described below: SUBAUDIO TX ENABLE (Bit 7) Bit 7 should be set to “1” to enable the CTCSS/DCS subaudio transmitter. The subaudio Tx type will depend on the state of the SUBAUDIO TX MODE (Bit 1 SIGNALLING SET-UP Register $82). TONE DECODER ENABLE (Bit 6) Bit 6 should be set to “1” to enable the CTCSS/Selcall tone decoder or the DCS decoder. Note: See also Bit 0 for DCS decoder operation. Bits 7 and 6 should not both be set to “1” when Bit 0 is set to “1” because the DCS function is half-duplex only. CTCSS FAST DETECT ENABLE (Bit 5) When this bit is "1", the FAST CTCSS DETECT or FAST CTCSS PREDICTIVE mode is enabled, depending upon the setting of FAST CTCSS MODE (Bit 3 SIGNALLING SET-UP Register, $82). When this bit is "0", both FAST CTCSS DETECT and FAST CTCSS PREDICTIVE tone detectors are disabled. SELCALL TX ENABLE (Bit 2) When this bit is "1" the Selcall transmitter is enabled. When this bit is "0" the Selcall transmitter is disabled and powersaved. DCS RX ENABLE (Bit 0) When this bit is "1" and Bit 6 is “1”, the DCS decoder is enabled. When this bit is "0" the DCS decoder is disabled. The DCS decoder and the subaudio (CTCSS or DCS) transmitter should not be enabled at the same time. (Bits 4, 3, and 1) Reserved for future use. These bits should be set to "0". |
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Similar Description - FX828D2 |
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