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MX214 Datasheet(PDF) 5 Page - CML Microcircuits |
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MX214 Datasheet(HTML) 5 Page - CML Microcircuits |
5 / 17 page Variable Split Band Inverter 5 MX214/224 1998 MX-COM, Inc. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 Doc. # 20480112.002 4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA All trademarks and service marks are held by their respective companies. MX214 Pin No. MX224 Pin No. Signal Name Description J/P LH J/P LH 15 11 11 11 Latch / Load This pin controls the loading of the 8 digital function inputs (ENABLE, CLEAR, A0-A4) into the internal register. When this pin is at a logic ‘1’, all eight inputs are transparent and new data acts directly. For controlled changing of parameters in the parallel, Latch / Load must be kept at logic ‘0’ while a new function is loaded, then strobed 0-1-0 to latch the inputs in. For serial loading, the serial data should be loaded with the Latch / Load at logic ‘0’ and then the Latch / Load strobed 0-1-0 on completion of data loading. Internal 1M pull-up resistor (Load). See Figure 8. 16 12 12 12 Powersave This digital input is used to place the MX214/224 into Powersave mode where all parts of the device except the 1MHz oscillator are shut down. All signal input and output lines are made open circuit, free of all bias. This allows signal paths to be routed externally around the device, while reducing current consumption. A logic ‘0’ at this input enables the device to work normally as shown in Table 2. Internal 1M pull-up resistor. 17 13 13 13 VSS Negative supply (GND) 18 14 14 14 Internal connection This pin is internally connected. Leave open circuit. 19 15 15 15 Rx Output This is the processed received audio signal output. This pin is held at a DC ‘bias’ voltage for all functions except Powersave. This buffered output is driven by the summing circuit in the Rx mode. Signal paths and bias levels are detailed in Table 2 and Figure 7. 20 16 16 16 Tx Output This is the processed audio output for the transmission channel. This pin is held at a DC ‘bias’ voltage for all functions except Powersave. This summed and buffered signal is passed through the CTCSS high pass Filter to the output pin in the Tx Mode. Signal paths and bias levels are detailed in Table 2 and Figure 6. 21 17 17 17 VBIAS Normally at VDD/2, this pin requires an external decoupling capacitor (C7) to VSS. 22 18 18 18 Rx Input This is the analog received signal input. This pin is held at a DC ‘bias’ voltage by a 300k on-chip bias resistor, which is selected for all functions except Powersave. It must be connected to external circuitry by capacitor C3. See Figure 2 and Figure 3. This input is routed through the CTCSS High Pass Filter in Rx mode to remove subaudio frequencies from the voiceband. Signal paths and bias levels are detailed in Table 2 and Figure 7. 1 19 19 19 Highband Filter Output The output of the Input Filter of the Upperband limit. The Tx / Rx functions sets the lowpass filter at 3400Hz or 2700Hz respectively. This output must be connected to the Highband Balanced modulator input via capacitor C5. See Figure 2 and Figure 3. |
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