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SPM6G140-060D Datasheet(PDF) 11 Page - Sensitron

Part # SPM6G140-060D
Description  Three-Phase IGBT BRIDGE, With Gate Driver and Magnetic Isolation
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Manufacturer  SENSITRON [Sensitron]
Direct Link  http://www.sensitron.com
Logo SENSITRON - Sensitron

SPM6G140-060D Datasheet(HTML) 11 Page - Sensitron

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SENSITRON
SEMICONDUCTOR
TECHNICAL DATA
DATASHEET 4977, Rev. B
©2004 Sensitron Semiconductor
• 221 West Industry Court
Deer Park, NY 11729
(631) 586 7600 FAX (631) 242 9798
• www.sensitron.com • sales@sensitron.com • Page 11
SPM6G140-060D
Brk ( Pins 26,27 ), is Brake Terminal. Brake Resistor shall be connected between these terminals and +VDC. If the
brake resistor is inductive, a freewheeling diode shall be connected across this resistor.
Gbrk ( Pin 28 ), is Brake IGBT Gate Input. Brake IGBT Emitter is internally connected to DC Bus return.
+VDC Rtn ( Pins 29 to 32 ), is DC Bus return.
+VDC (Pins 33 to 36 ), is +DC Bus input.
PhC (Pins 37 to 39 ), is Phase C output.
PhB (Pins 40 to 42 ), is Phase B output.
PhA (Pins 43 to 45 ), is Phase A output.
A- DC Bus Charging from 15V
Each IGBT is protected against desaturation.
D2 is the desaturation sense diode for the high-side IGBT
D3 is the desaturation sense diode for the low-side IGBT
When the DC bus voltage is not applied or below 15V, there is a charging path from the 15V supply to
the DC bus through D2 and D3 and the corresponding pull up 100K Ohm resistor. The charging current
is 0.15mA per IGBT. Total charging current is about 1.5mA.
Do not apply PWM signal if the DC bus voltage is below 20V.
B- Bias For Desaturation Detection Circuit:
The desaturation detection is done by diode D2 for the high side IGBT Q1H, and by diode D3 for the low side
IGBT Q1L. The internal detection circuit, input DSH for the high-side and input DSL for the low-side, is
biased by the local supply voltage VCC for the low side and VBS for the high side. When the IGBT is on the
corresponding detection diode is on. The current flowing through the diode is determined by the internal pull
resistor, R1 for the high side and R2 for the low side. To minimize the current drain from VCC and VBS, R1
and R2 are set to be 100K
Ω. Lower value of R1 will overload the bootstrap circuit and reduce the bootstrap
capacitor holding time.
DS
DS
D1
Gate
Driver
+15V Rtn
Sgnl Gnd1
+VDC
PhA
Vcc
+15V
Q1H
Q1L
D2
D3
R1
100K
Ω
700
K
Ω
R2
100K
Ω
700
K
Ω
+VDC Rtn
Figure 7.
Charging Path from 15V Supply to DC Bus when DC Bus is off
VB


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