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ISPLSI5256V-100LB208 Datasheet(PDF) 11 Page - Lattice Semiconductor |
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ISPLSI5256V-100LB208 Datasheet(HTML) 11 Page - Lattice Semiconductor |
11 / 25 page Specifications ispLSI 5256V 11 Switching Test Conditions Input Pulse Levels Table 2 - 0003/5384 Input Rise and Fall Time Input Timing Reference Levels Ouput Timing Reference Levels Output Load GND to VCCIOmin ≤ 1.5ns 10% to 90% 1.5V 1.5V See figure 3-state levels are measured 0.5V from steady-state active level. Output Load Conditions (See figure 8) TEST CONDITION R1 3.3V 2.5V R2 CL A 35pF D 35pF B 35pF 35pF Active High Slow Slew Active Low C 5pF 5pF 511 Ω ∞ ∞ 511 Ω 511 Ω ∞ 475 Ω ∞ 475 Ω ∞ ∞ 475 Ω R1 R2 316 Ω ∞ ∞ 316 Ω 316 Ω ∞ 348 Ω ∞ 348 Ω ∞ ∞ 348 Ω Active Low to Z at V +0.5V OL Active High to Z at V -0.5V OH Table 2 - 0004A/5384 VOL SYMBOL 1. Typical values are at VCC = 3.3V and TA = 25°C. Table 2 - 0007/5256 VOH VIH VIL PARAMETER Output Low Voltage Output High Voltage Input High Voltage Input Low Voltage IOL = 8 mA IOH = -4 mA VOH ≤ VOUT or VOUT ≤ VOL(max) VOH ≤ VOUT or VOUT ≤ VOL (max) CONDITION MIN. TYP. MAX. UNITS 1 – 2.4 2.0 -0.3 – – – – 0.4 – 5.25 0.8 V V VCCIO I/O Reference Voltage 3.0 – 3.6 V V V DC Electrical Characteristics for 3.3V Range Over Recommended Operating Conditions Figure 9. Test Load VCCIO R1 R2 CL* Device Output Test Point *CL includes Test Fixture and Probe Capacitance. 0213D |
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